Nexperia USA Inc. PMPB10R3XNX

Overview

PMPB10R3XNX from Nexperia is a 30 V, N-channel enhancement-mode Trench MOSFET in a DFN2020M-6 (SOT1220-2) leadless ultra-thin SMD package, optimized for high-efficiency power switching in space-constrained portable electronics. It delivers 13 A continuous drain current at 4.5 V gate drive, 10.3 mΩ typical R_DS(on) at 25 °C, and features an exposed drain pad for enhanced thermal conduction.

For engineers reviewing the PMPB10R3XNX datasheet, PMPB10R3XNX pinout, PMPB10R3XNX application, or PMPB10R3XNX equivalent, key selection criteria include low-threshold operation (0.65 V typ), thermal performance on FR4 PCBs (R_th(j-sp) = 5–6.5 K/W), and robust safe operating area up to 128 A peak drain current.

Technical Context

This MOSFET employs Trench technology to achieve low R_DS(on) and fast switching with Q_G(tot) = 6.6–9.9 nC and t_r/t_f = 6 ns / 7 ns under standard test conditions. Its gate threshold voltage (0.4–0.9 V) enables direct interfacing with 1.8 V and 2.5 V logic controllers without level shifting.

The device integrates a source-drain diode with V_SD = 0.7–1.2 V at 1.5 A and t_rr = 12 ns, supporting synchronous rectification in DC-DC converters. Thermal design is enabled by its 2 × 2 × 0.65 mm footprint and solder-point thermal resistance of 5 K/W.

Key Specifications

Pinout & Package

DFN2020M-6 (SOT1220-2) is a 2 × 2 × 0.65 mm leadless thermally enhanced plastic package with an exposed drain pad on the bottom side for direct PCB thermal coupling.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel power switching applications.

Compared with DMN3026LSD-13 and Si2302DDS-T1-GE3, PMPB10R3XNX offers superior thermal performance (5 K/W vs. >30 K/W), 3× lower R_DS(on) than Si2302DDS, and 30% lower gate charge than DMN3026LSD-making it optimal for high-density, high-efficiency portable power switches.

Availability

PMPB10R3XNX is available at Aetrix Electronics and suitable for charging switches, DC-DC converters, battery-powered portable power management, and computing peripheral power sequencing requiring stable component supply and long-term lifecycle support.

Supply support for PMPB10R3XNX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in advanced packaging and automotive-qualified components.

PMPB10R3XNX belongs to Nexperia's TrenchMOS portfolio, engineered specifically for ultra-compact, thermally constrained power management in consumer portables and wearables where efficiency, size, and low-voltage drive are critical.

FAQ

What is the maximum continuous drain current for PMPB10R3XNX at 100 °C ambient temperature?

The maximum continuous drain current is 5.6 A at T_amb = 100 °C, as specified in Table 5 (Limiting values). This derating reflects thermal constraints when mounted on a standard FR4 PCB with single-sided copper and a 6 cm² drain pad, ensuring junction temperature remains within the 150 °C absolute maximum rating.

Does PMPB10R3XNX require a gate resistor for ESD protection or switching control?

No external gate resistor is required for ESD protection-the device has built-in gate protection diodes rated per HBM (2 kV) and CDM (1 kV) standards. A small series gate resistor (≤10 Ω) may be used to damp ringing in high-dI/dt applications, but it is not mandatory for basic switching functionality or reliability.

Can PMPB10R3XNX be used in reverse conduction mode (source-to-drain current)?

Yes-the integrated body diode supports source-to-drain conduction with V_SD = 0.7–1.2 V at 1.5 A and t_rr = 12 ns. However, reverse conduction should be limited to brief intervals (e.g., synchronous rectification dead-time) due to higher forward voltage and lack of avalanche rating; sustained reverse current must stay within I_S = 1.5 A limit.

What PCB layout recommendations maximize thermal performance for PMPB10R3XNX?

Maximize thermal performance by using a minimum 6 cm² copper pour connected to the exposed drain pad via ≥6 thermal vias (0.3 mm diameter, filled or capped), placed directly beneath the package. Avoid solder mask over the drain pad, use 2 oz copper, and ensure no high-impedance traces interrupt the thermal path to internal ground or power planes.