Nexperia USA Inc. PMPB17EPX
- Part No.:
- PMPB17EPX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- 6-UDFN Exposed Pad
- Datasheet:
-
PMPB17EPX.pdf
- Description:
- P-CHANNEL TRENCH MOSFET
- Quantity:
- Payment:

- Shipping:

Inventory:8,499
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Product details
Overview
PMPB17EPX from Nexperia is a 30 V, P-channel enhancement-mode Trench MOSFET in a DFN2020M-6 (SOT1220-2) leadless ultra-thin SMD package, optimized for high-efficiency power switching in space-constrained portable electronics. It delivers RDS(on) = 17.5 mΩ at VGS = −10 V and ID = −5.8 A, supports logic-level gate drive (VGS(th) = −1.7 V typ), and features an exposed drain pad for enhanced thermal conduction in battery-powered DC-DC converters and charging switches.
For engineers reviewing the PMPB17EPX datasheet, PMPB17EPX pinout, PMPB17EPX application, or PMPB17EPX equivalent, this device is selected for low-voltage P-channel load switching where compact size, thermal performance on FR4 PCBs, and stable RDS(on) over temperature are critical - especially in portable device power management subsystems requiring <2 mm × 2 mm footprint and ≤0.65 mm height.
Technical Context
This MOSFET employs Trench MOSFET technology to achieve low on-resistance and fast switching with QG(tot) = 31 nC and tf = 19 ns under standard test conditions. Its gate threshold voltage (−1.7 V typ) ensures reliable turn-on with 3.3 V logic controllers without level-shifting circuitry.
The device operates within −55 °C to 150 °C junction temperature range and exhibits normalized RDS(on) drift of ~1.5× from 25 °C to 150 °C. Thermal resistance from junction to solder point is as low as 6 K/W when mounted on a 6 cm² drain pad - enabling sustained 3.8 W power dissipation at Tamb = 25 °C for short pulses.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | −30 V - Maximum drain-source blocking voltage; suitable for 12–24 V rail protection and battery-side high-side switching. |
| RDS(on) | 17.5 mΩ @ VGS = −10 V, ID = −5.8 A, Tj = 25 °C - Enables <100 mW conduction loss at 5 A, critical for thermally limited portable PCBs. |
| VGS(th) | −1.7 V typ @ ID = −250 µA - Ensures full enhancement with 3.3 V microcontroller GPIO, eliminating external gate drivers. |
| QG(tot) | 31 nC - Low gate charge reduces driver power demand and enables efficient 1–2 MHz switching in synchronous buck topologies. |
| Rth(j-sp) | 6 K/W min - Junction-to-solder-point thermal resistance confirms effective heat transfer to PCB copper, supporting >2.5 A continuous current on standard FR4. |
| ID (cont) | −7.7 A @ Tamb = 25 °C - Continuous drain current rating validated on single-sided tin-plated FR4 with 6 cm² drain pad. |
| Ciss | 1570 pF - Input capacitance impacts gate drive loop stability and EMI in high-frequency SMPS designs. |
Pinout & Package
Package: DFN2020M-6 (SOT1220-2), 2 mm × 2 mm × 0.65 mm, leadless, thermally enhanced with exposed drain pad. Six terminals arranged in dual-row configuration; pins 1, 2, 5, 6, and 7 are internally connected to drain; pin 3 is gate; pins 4 and 8 are source.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 5, 6, 7 | Drain (D) | High-current output node; electrically and thermally tied to exposed bottom pad - must be routed to large copper pour for thermal management. |
| 3 | Gate (G) | Control input; requires low-impedance drive due to 5.9 Ω intrinsic gate resistance; sensitive to ESD (±20 V absolute max). |
| 4, 8 | Source (S) | Reference node for gate drive and current sensing; connects to system ground or battery negative in high-side switch configurations. |
Key Features
| Feature | Design Value |
|---|---|
| Logic-level compatible gate | VGS(th) = −1.7 V typ enables direct drive from 3.3 V MCUs without level shifters - reducing BOM count and layout complexity. |
| Ultra-compact DFN2020M-6 package | 2 mm × 2 mm × 0.65 mm footprint saves >60% board area vs. SO-8; ideal for thin-profile smartphones, wearables, and USB-C PD accessories. |
| Exposed drain pad | Thermal resistance Rth(j-sp) = 6 K/W minimizes junction temperature rise - extends reliability in sealed enclosures with no airflow. |
| Trench MOSFET architecture | Optimized cell density achieves 17.5 mΩ RDS(on) at −10 V while maintaining low QGD/QG ratio (6.5/31 nC) for reduced switching losses. |
| Low gate leakage | IGSS ≤ ±100 nA at ±20 V ensures minimal standby current in always-on battery monitoring circuits. |
Applications
| Charging Switch for Portable Devices | DC-DC Converter High-Side Switch |
|---|---|
|
Use Scenario: Bidirectional USB-C power path control in smartphones and tablets, managing battery charge/discharge routing between adapter and battery. IC Role / Device Role: P-channel high-side load switch controlling VBUS-to-battery connection; configured with reverse polarity protection and inrush limiting. Use Value: 17.5 mΩ RDS(on) limits voltage drop to <100 mV at 5 A, preserving battery charging efficiency; logic-level gate eliminates need for auxiliary bias rails. |
Use Scenario: Synchronous rectification in 3.3 V/5 V buck converters powering SoCs and PMICs in portable computing devices. IC Role / Device Role: High-side P-channel switch in non-synchronous or pseudo-synchronous topology, replacing Schottky diodes to reduce conduction loss. Use Value: 31 nC total gate charge enables clean 1 MHz switching with minimal driver loss; low Coss (159 pF) suppresses ringing during hard commutation. |
| Power Management in Battery-Driven Devices | Hard Disk Drive Power Sequencing |
|
Use Scenario: System-level power gating for peripherals (e.g., Bluetooth modules, sensors) in IoT edge nodes powered by Li-ion cells. IC Role / Device Role: Low-quiescent-current load switch isolating downstream circuitry during sleep mode; controlled via MCU GPIO. Use Value: Gate leakage ≤100 nA prevents measurable battery drain during multi-week standby; −30 V VDS accommodates fully charged 4S Li-ion packs (≤16.8 V). |
Use Scenario: Controlled 12 V/5 V power enable for HDD spindle motors and interface ICs during boot-up and shutdown sequences. IC Role / Device Role: High-reliability power switch sequencing component ensuring proper voltage ramp timing and inrush current limiting. Use Value: 31 A peak drain current (IDM) handles HDD motor startup surges; robust 150 °C Tj(max) withstands localized heating near mechanical actuators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel load switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN2011UFD-13 | RDS(on) = 22 mΩ @ −4.5 V; higher gate charge (42 nC); same DFN2020M-6 package. | Slightly lower efficiency at 3.3 V gate drive; less suitable for high-frequency (>500 kHz) switching due to slower tf. | Prefer when cost sensitivity outweighs marginal RDS(on) penalty and thermal margin is ample. |
| SI2301DDS-T1-BE3 | RDS(on) = 115 mΩ @ −4.5 V; TO-236 package (higher Rth(j-a) = 223 K/W); lower VDS (−20 V). | Not viable for 12 V systems or high-current loads; unsuitable for space-constrained layouts due to larger footprint and height. | Select only for legacy designs using TO-236 footprints or sub-5 V battery applications where ultra-low cost dominates. |
Compared with DMN2011UFD-13 and SI2301DDS-T1-BE3, PMPB17EPX offers the lowest RDS(on) at logic-level drive, best thermal performance in its class, and optimal balance of size, efficiency, and surge capability for modern portable power architectures.
Availability
PMPB17EPX is available at Aetrix Electronics and suitable for charging switches, DC-DC converter high-side switches, and battery-powered peripheral power gating requiring stable component supply, consistent parametric performance across production lots, and long-term lifecycle support.
Supply support for PMPB17EPX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.
The PMPB17EPX belongs to Nexperia's TrenchMOS® P-channel portfolio, engineered specifically for compact, high-efficiency power switching in battery-operated portable electronics where thermal density and gate drive simplicity are design-critical.
FAQ
What is the maximum continuous drain current for PMPB17EPX at 100 °C ambient temperature?
The maximum continuous drain current is −4.9 A at Tamb = 100 °C, measured with the device mounted on an FR4 PCB with single-sided copper, tin-plated, and a 6 cm² drain mounting pad. This derating reflects thermal limitations under real-world board-level conditions, not just die capability.
Does PMPB17EPX require a gate resistor for ESD protection or switching control?
No external gate resistor is required for ESD protection - the device has built-in gate protection diodes rated for ±20 V. However, a small series gate resistor (typically 5–10 Ω) is recommended to dampen ringing and control dV/dt during fast switching, especially when driving from low-impedance MCU pins.
Can PMPB17EPX be used in parallel configurations for higher current handling?
Yes, but with careful layout: matched gate drive paths, symmetrical source/drain routing, and shared thermal mass are essential. The device's positive RDS(on) temperature coefficient (1.5× increase from 25 °C to 150 °C) provides inherent current sharing stability, unlike some N-channel counterparts.
Is the exposed drain pad on PMPB17EPX electrically isolated from the PCB ground plane?
No - the exposed drain pad is electrically connected to pins 1, 2, 5, 6, and 7 (all drain terminals). It must be soldered directly to a dedicated, thermally optimized copper pour that is either floating or tied to the drain net. Connecting it to system ground will cause catastrophic shorting in high-side switch configurations.
PMPB17EPX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-UDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 7.7A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 21mOhm @ 5.8A, 10V
- Vgs(th) (Max) @ Id:
- 2.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 47 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 1570 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 1.9W (Ta), 13W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN2020M-6
PMPB17EPX FAQ
1.How can I place an order for PMPB17EPX through Aetrix?
Please submit a Request for Quotation (RFQ) for PMPB17EPX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PMPB17EPX reliable?
The price and inventory of PMPB17EPX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PMPB17EPX is usually 5 days.
3.What payment methods are accepted for PMPB17EPX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PMPB17EPX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PMPB17EPX?
PMPB17EPX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PMPB17EPX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PMPB17EPX?
For technical support, including PMPB17EPX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PMPB17EPX requirements.
6.How does Aetrix verify that PMPB17EPX is sourced from the original manufacturer or authorized distributors?
All PMPB17EPX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PMPB17EPX meets industry standards.
7.What is the process for return or replacement of PMPB17EPX?
All PMPB17EPX units undergo pre-shipment inspection (PSI). If there is an issue with PMPB17EPX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PMPB17EPX part is unused and in its original packaging.
Return procedure for PMPB17EPX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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