Nexperia USA Inc. PMV65UNER
- Part No.:
- PMV65UNER
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
PMV65UNER.pdf
- Description:
- MOSFET N-CH 20V 2.8A TO236AB
- Quantity:
- Payment:

- Shipping:

Inventory:385
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PMV65UNER from Nexperia is a 20 V, N-channel enhancement-mode Trench MOSFET in SOT23 (TO-236AB) package, designed for low-side switching in space-constrained DC/DC and LED driver circuits. It delivers RDS(on) = 63 mΩ @ VGS = 4.5 V, ID = 2.8 A, supports 3.4 A continuous drain current at 25 °C, and features ESD protection >2 kV HBM.
For engineers reviewing the PMV65UNER datasheet, PMV65UNER pinout, PMV65UNER application, or PMV65UNER equivalent, this page provides verified package mapping, thermal derating curves, gate charge timing (QG(tot) = 3.8–6 nC), SOA boundaries, and real-world mounting conditions for FR4 PCBs with 6 cm² drain pad.
Technical Context
This MOSFET uses Trench technology to achieve low threshold voltage (VGS(th) = 0.45–1 V) and stable RDS(on) over temperature - 93 mΩ @ Tj = 150 °C, VGS = 4.5 V, ID = 2.8 A. Its 221–254 K/W junction-to-ambient thermal resistance in free air enables compact thermal design without heatsinking in low-duty-cycle applications.
The device operates with fast switching dynamics: td(on) = 8 ns, tr = 23 ns, td(off) = 35 ns, tf = 12 ns (VDS = 10 V, ID = 2.8 A, RG(ext) = 6 Ω), and exhibits low output capacitance (Coss = 52 pF) and reverse transfer capacitance (Crss = 43 pF), supporting efficient high-frequency PWM control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 20 V maximum - defines safe blocking voltage in low-voltage power rails (e.g., 12 V automotive, 5–19 V industrial supplies). |
| RDS(on) | 63 mΩ typical @ VGS = 4.5 V, ID = 2.8 A, Tj = 25 °C - enables <170 mW conduction loss at 2.8 A, critical for thermally limited SOT23 layouts. |
| ID (continuous) | 3.4 A @ Tamb = 25 °C, t ≤ 5 s - specifies short-term load capability on standard FR4 with 6 cm² drain pad. |
| Ptot | 940 mW @ Tamb = 25 °C - sets absolute power limit before thermal shutdown; derates to 0 W at Tj = 150 °C per Fig. 1. |
| QG(tot) | 3.8–6 nC - determines gate drive energy and switching loss; compatible with low-current microcontroller GPIOs (e.g., 3.3 V/20 mA logic drivers). |
| VGS(th) | 0.45–1 V - ensures reliable turn-on from 1.8 V logic and compatibility with battery-powered systems down to 2.5 V supply. |
| Ciss | 291 pF - impacts gate drive loop stability and EMI filtering requirements in high-speed switching nodes. |
Pinout & Package
Package: TO-236AB (SOT23), plastic surface-mounted, 3-lead, single-sided copper FR4-compatible footprint with 6 cm² drain thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | G (Gate) | Control terminal; accepts 0–8 V logic-level signals; requires <5 µA leakage current at VGS = ±4.5 V. |
| 2 | S (Source) | Reference node for gate drive and current return path; tied to system ground in low-side switch configurations. |
| 3 | D (Drain) | High-current output terminal; electrically and thermally connected to PCB copper pour for heat dissipation (Rth(j-sp) = 17–20 K/W). |
Key Features
| Feature | Design Value |
|---|---|
| Trench MOSFET architecture | Enables lower RDS(on) and higher cell density vs planar MOSFETs - critical for miniaturized SOT23 power switches. |
| ESD protection >2 kV HBM | Eliminates need for external ESD clamps in board-level handling and assembly environments. |
| Low VGS(th) range (0.45–1 V) | Guarantees turn-on with 1.8 V and 2.5 V logic families, reducing gate driver complexity and BOM count. |
| Enhanced Ptot = 940 mW | Provides 2× higher power dissipation than standard SOT23 MOSFETs - enables higher current in same footprint. |
| Source-drain diode VSD = 0.7–1.2 V | Supports synchronous rectification or freewheeling paths without external Schottky diodes in buck converters. |
Applications
| LED Driver | Power Management |
|---|---|
Use Scenario: Constant-current dimming of white LEDs in portable lighting and indicator panels. IC Role / Device Role / Timing Role: Low-side current switch controlled by PWM signal from MCU or dedicated LED driver IC. Use Value: 63 mΩ RDS(on) minimizes voltage drop across switch, preserving headroom for LED forward voltage and enabling >95% efficiency at 2.8 A. |
Use Scenario: Load switching for USB-powered peripherals, sensor modules, and backup power rails. IC Role / Device Role / Timing Role: Controlled power enable/disconnect element with fast turn-off (tf = 12 ns) to prevent inrush and fault propagation. Use Value: 3.4 A rating and 2 kV HBM ESD withstand allow direct connection to unshielded connectors without additional protection circuitry. |
| Low-Side Loadswitch | Switching Circuits |
Use Scenario: Hot-swap control in industrial I/O modules and programmable logic controllers (PLCs). IC Role / Device Role / Timing Role: Primary current-handling switch activated by isolated digital signal; monitors load via sense resistor in source path. Use Value: Low VGS(th) ensures full enhancement at 3.3 V logic levels, while 150 °C max junction temperature supports operation in sealed enclosures. |
Use Scenario: High-frequency chopper in DC-DC step-down regulators and motor gate drivers. IC Role / Device Role / Timing Role: Main power switch synchronized to controller clock; driven by gate driver with 6 Ω series resistance. Use Value: QG(tot) = 3.8–6 nC and Crss = 43 pF reduce Miller-induced shoot-through risk and support >500 kHz switching without excessive gate drive loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel low-voltage switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN2004LK-7 | RDS(on) = 48 mΩ @ 4.5 V but rated only to 20 V VDS; no specified ESD rating; slightly larger SOT-23-3 footprint (L=2.9 mm vs 2.5 mm). | Better conduction loss but lacks documented HBM ESD protection - requires external clamping in noisy environments. | Select when lowest RDS(on) is primary and board layout allows marginally longer package. |
| AO3400 | RDS(on) = 40 mΩ @ 4.5 V; VDS = 30 V; QG(tot) = 12 nC - higher gate charge increases drive loss and slows switching. | Higher voltage rating suits 24 V systems but overshoots requirement for 12–20 V rails; slower switching limits high-frequency use. | Choose only if future-proofing for 24 V operation is required and gate drive capability supports 12 nC. |
Compared with DMN2004LK-7 and AO3400, PMV65UNER offers optimal balance of ESD robustness, thermal performance (940 mW), and gate drive simplicity (low QG, low VGS(th)) for cost-sensitive, space-limited 20 V-class switching - making it preferred for LED drivers and portable power management where reliability and layout efficiency are critical.
Availability
PMV65UNER is available at Aetrix Electronics and suitable for LED driver design, low-side loadswitch implementation, and high-frequency switching circuits requiring stable component supply, consistent parametric performance, and long-term production continuity.
Supply support for PMV65UNER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential semiconductors - high-volume, high-reliability discrete, logic, and MOSFET solutions for automotive, industrial, and consumer markets.
The PMV65UNER belongs to Nexperia's TrenchMOS portfolio, engineered specifically for low-voltage, high-efficiency switching in space-constrained applications where thermal performance, logic-level drive, and ESD resilience are non-negotiable.
FAQ
What is the maximum continuous drain current for PMV65UNER at 100 °C ambient temperature?
The maximum continuous drain current for PMV65UNER is 1.8 A at Tamb = 100 °C, as specified in Table 5 (Limiting values). This reflects thermal derating due to reduced heat dissipation capability at elevated ambient temperatures on a standard FR4 PCB with 6 cm² drain pad.
Does PMV65UNER support 1.8 V logic-level gate drive?
Yes - its gate-source threshold voltage (VGS(th)) ranges from 0.45 V to 1.0 V at Tj = 25 °C, ensuring full enhancement with 1.8 V logic. At VGS = 1.8 V and ID = 0.8 A, RDS(on) is 83–94 mΩ, confirmed in Table 7 (Characteristics).
What is the safe operating area (SOA) limitation at DC and pulse conditions?
Per Figure 3, the DC SOA is bounded by RDS(on) = VDS/ID and Ptot = 940 mW at Tamb = 25 °C. For single-pulse operation (tp ≤ 10 µs), peak drain current reaches 11 A at VDS = 10 V, constrained by thermal inertia rather than bondwire limits.
How does the thermal resistance change with PCB copper area?
Rth(j-a) improves from 221–254 K/W (standard footprint) to 116–133 K/W when using a 6 cm² drain pad - a 48% reduction. This is explicitly defined in Table 6 and validated in Figures 4 and 5 for transient thermal impedance under pulsed conditions.
PMV65UNER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 20 V
- Current - Continuous Drain (Id) @ 25°C:
- 2.8A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 1.8V, 4.5V
- Rds On (Max) @ Id, Vgs:
- 73mOhm @ 2.8A, 4.5V
- Vgs(th) (Max) @ Id:
- 1V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 6 nC @ 10 V
- Vgs (Max):
- ±8V
- Input Capacitance (Ciss) (Max) @ Vds:
- 291 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 490mW (Ta)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-236AB
PMV65UNER FAQ
1.How can I place an order for PMV65UNER through Aetrix?
Please submit a Request for Quotation (RFQ) for PMV65UNER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PMV65UNER reliable?
The price and inventory of PMV65UNER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PMV65UNER is usually 5 days.
3.What payment methods are accepted for PMV65UNER?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PMV65UNER transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PMV65UNER?
PMV65UNER orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PMV65UNER order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PMV65UNER?
For technical support, including PMV65UNER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PMV65UNER requirements.
6.How does Aetrix verify that PMV65UNER is sourced from the original manufacturer or authorized distributors?
All PMV65UNER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PMV65UNER meets industry standards.
7.What is the process for return or replacement of PMV65UNER?
All PMV65UNER units undergo pre-shipment inspection (PSI). If there is an issue with PMV65UNER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PMV65UNER part is unused and in its original packaging.
Return procedure for PMV65UNER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PMV65UNER Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

