NXP Semiconductors PMXB65ENEZ
- Part No.:
- PMXB65ENEZ
- Manufacturer:
- NXP Semiconductors
- Category:
- FETs, MOSFETs
- Package:
- -
- Datasheet:
-
PMXB65ENEZ.pdf
- Description:
- NEXPERIA PMXB65EN - SMALL SIGNAL
- Quantity:
- Payment:

- Shipping:

Inventory:710,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PMXB65ENE from NXP Semiconductors is a 30 V, N-channel Trench MOSFET in a DFN1010D-3 (SOT1215) package, optimized for low-side switching in portable electronics. It delivers RDS(on) = 44 mΩ at VGS = 10 V and ID = 3.2 A, supports 1 kV ESD protection, and features an exposed drain pad for thermal conduction in space-constrained battery-powered systems.
For engineers reviewing the PMXB65ENE datasheet, PMXB65ENE pinout, PMXB65ENE application, or PMXB65ENE equivalent, this page provides verified electrical parameters, thermal performance data, PCB footprint guidance, and real-world use cases for load switching, LED driving, and DC-DC power stages in ultra-thin consumer devices.
Technical Context
This MOSFET employs TrenchMOS technology to achieve low on-resistance and fast switching with QG(tot) = 6–11 nC and tr/tf = 12 ns/3 ns. Its gate threshold voltage (VGS(th)) ranges from 1.0 V to 2.5 V, enabling reliable turn-on with 3.3 V or 4.5 V logic-level drive.
Thermal design is supported by Rth(j-sp) = 10–15 K/W to solder point and Rth(j-a) = 102–117 K/W on a 6 cm² drain pad - critical for sustained 2.5 A operation at 100 °C ambient in compact layouts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V maximum - supports input rails up to 28 V in battery-powered systems without breakdown risk |
| RDS(on) | 44 mΩ typical at VGS = 10 V, ID = 3.2 A - limits conduction loss to ≤450 mW at 3.2 A |
| ID | 3.2 A continuous at Tamb = 25 °C - sufficient for USB-C PD charging switches and LED backlight drivers |
| VGS(th) | 1.4 V typical - ensures full enhancement with standard 3.3 V GPIO or PMIC control signals |
| QG(tot) | 6–11 nC - enables efficient 1–2 MHz switching in synchronous buck converters with low gate-drive power |
| ESD Rating | 1 kV HBM - protects against handling damage during SMT assembly of handheld PCBs |
| Package | DFN1010D-3 (SOT1215), 1.1 × 1.0 × 0.37 mm - fits 1.2 mm × 1.0 mm land pattern with exposed drain for thermal relief |
Pinout & Package
DFN1010D-3 (SOT1215) is a leadless, thermally enhanced ultra-thin plastic package with an exposed drain pad on the bottom side for direct PCB heat sinking. Dimensions: 1.1 mm × 1.0 mm × 0.37 mm. The top-side marking "00 10 00" identifies PMXB65ENE.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | G (Gate) | Control terminal; accepts 0–10 V logic-level signals; requires <1 Ω gate resistance for optimal switching |
| 2 | S (Source) | Reference node for gate drive and current return path; tied to system ground in low-side configurations |
| 3 & 4 | D (Drain) | Power output terminal; electrically and thermally connected to exposed bottom pad - must be soldered to ≥6 cm² copper area |
Key Features
| Feature | Design Value |
|---|---|
| TrenchMOS architecture | Enables 44 mΩ RDS(on) in 1.1 × 1.0 mm footprint - reduces board area vs. larger SOT-23 or SC-70 alternatives |
| Exposed drain pad | Lowers Rth(j-sp) to 10–15 K/W - allows 2.5 A continuous current at 100 °C ambient with minimal heatsinking |
| 1 kV HBM ESD rating | Eliminates need for external ESD protection diodes in portable device front-end switches |
| Ultra-thin 0.37 mm profile | Supports <0.4 mm Z-height designs in slim smartphones, wearables, and hearing aids |
| Low QGD/QG ratio | 0.9 nC / 6–11 nC - improves hard-switching efficiency and reduces Miller-induced shoot-through risk |
Applications
| Smartphone Charging Switch | Wireless Earbud LED Driver |
|---|---|
Use Scenario: Controls USB-C power path between battery and Type-C port during wired charging, enabling reverse boost and load switch isolation. IC Role / Device Role / Timing Role: Low-side N-channel MOSFET used as bidirectional load switch with integrated ESD protection and thermal monitoring via junction sensing. Use Value: 44 mΩ RDS(on) minimizes voltage drop across switch (<140 mV @ 3.2 A), preserving battery-to-port efficiency while fitting under 0.4 mm chassis height. | Use Scenario: Drives white LEDs in true wireless stereo (TWS) earbuds with PWM dimming and overcurrent protection. IC Role / Device Role / Timing Role: Constant-current sink switch operating at 1–5 kHz PWM frequency; gate driven directly by MCU GPIO. Use Value: 1.4 V VGS(th) ensures full turn-on with 1.8 V or 3.3 V MCU outputs; 1 kV ESD withstand prevents failure during automated assembly and end-user handling. |
| Portable SSD Power Management | USB-C Power Delivery Sink |
Use Scenario: Enables/disables 5 V rail to NVMe controller and NAND flash during sleep/wake transitions in M.2 SSD modules. IC Role / Device Role / Timing Role: Low-quiescent-power load switch with fast turn-off (tf = 3 ns) to meet USB-IF power state timing requirements. Use Value: 3.2 A ID rating supports peak SSD burst currents; DFN1010D-3 footprint aligns with high-density BGA routing constraints. | Use Scenario: Implements programmable power sink in USB-C accessories requiring 5–20 V input with dynamic load switching. IC Role / Device Role / Timing Role: High-efficiency, thermally robust N-channel switch placed between CC logic and VBUS path for fault-isolated power negotiation. Use Value: Exposed drain pad dissipates >8 W transient power during hot-plug events; 30 V VDS rating covers full USB PD 3.0 voltage range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel low-side switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN10H400LPS-13 | RDS(on) = 40 mΩ @ 4.5 V (vs. 56 mΩ for PMXB65ENE); higher 40 V VDS; same DFN1010-3 package | Better suited for 12 V industrial inputs; slightly larger gate charge (12 nC) | Select when higher voltage margin or lower RDS(on) at 4.5 V is required; verify layout compatibility with identical footprint |
| AO3400A | RDS(on) = 40 mΩ @ 10 V; SOT-23 package (larger, 2.9 × 1.3 mm); no exposed drain pad; 1.7 A ID rating | Lower thermal performance; limited to <1.5 A continuous; less ESD robust (1.5 kV) | Choose only if legacy SOT-23 compatibility is mandatory; avoid in thermally constrained or high-reliability portable designs |
Compared with DMN10H400LPS-13 and AO3400A, PMXB65ENE offers superior thermal dissipation per unit area due to its exposed drain pad and 0.37 mm profile, making it the preferred choice for ultra-thin battery-powered devices where RDS(on), size, and thermal management are jointly constrained.
Availability
PMXB65ENE is available at Aetrix Electronics and suitable for smartphone charging switches, TWS earbud LED drivers, portable SSD power sequencing, and USB-C PD sink applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for PMXB65ENE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and mobile markets.
The PMXB65ENE belongs to NXP's TrenchMOS portfolio, designed specifically for space- and thermally constrained portable electronics requiring high-efficiency, low-voltage N-channel switching in sub-1 mm² footprints.
FAQ
What is the maximum continuous drain current for PMXB65ENE at 100 °C ambient temperature?
The PMXB65ENE supports 2.5 A continuous drain current at Tamb = 100 °C when mounted on an FR4 PCB with a 6 cm² drain pad. This derating reflects thermal limits defined in Table 5 of the datasheet and is validated by the normalized current curve in Figure 2. Operation above this current requires active cooling or reduced ambient conditions to maintain Tj ≤ 150 °C.
Does PMXB65ENE require a gate resistor for safe switching in a 3.3 V MCU-driven load switch?
Yes - while PMXB65ENE turns on fully with 3.3 V gate drive (VGS(th) max = 2.5 V), a series gate resistor (typically 5–22 Ω) is recommended to dampen ringing, limit peak gate current, and control dV/dt during switching. The gate resistance RG is specified as 1 Ω (typical), so external resistance dominates gate loop impedance and ensures robust EMI performance in portable PCB layouts.
Can PMXB65ENE be used in a high-side configuration?
No - PMXB65ENE is an N-channel MOSFET with source tied to ground in its standard DFN1010D-3 pinout (Pin 2 = S). High-side operation would require floating gate drive referenced to the drain, which is not supported by its single-ended gate structure or thermal design. For high-side switching, a P-channel device or dedicated high-side driver IC is required.
What is the thermal resistance from junction to solder point (Rth(j-sp)) for PMXB65ENE?
The PMXB65ENE has a junction-to-solder-point thermal resistance of 10–15 K/W, as specified in Table 6 under "Rth(j-sp)" with conditions matching a standard FR4 PCB and tin-plated mounting pad. This value assumes proper soldering of the exposed drain pad to the PCB thermal pad and is critical for calculating steady-state junction temperature in compact layouts.
Is the DFN1010D-3 package of PMXB65ENE compatible with standard reflow profiles?
Yes - the DFN1010D-3 package is qualified for lead-free reflow per JEDEC J-STD-020. Recommended peak temperature is 260 °C for ≤30 seconds, with ramp rates ≤3 °C/s. Figure 19 in the datasheet provides the exact solder land pattern (1.1 mm × 0.75 mm), and the exposed drain pad must be fully soldered to ensure mechanical reliability and thermal performance of the PMXB65ENE.
PMXB65ENEZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- FET Type:
- -
- Technology:
- -
- Drain to Source Voltage (Vdss):
- -
- Current - Continuous Drain (Id) @ 25°C:
- -
- Drive Voltage (Max Rds On, Min Rds On):
- -
- Rds On (Max) @ Id, Vgs:
- -
- Vgs(th) (Max) @ Id:
- -
- Gate Charge (Qg) (Max) @ Vgs:
- -
- Vgs (Max):
- -
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- FET Feature:
- -
- Power Dissipation (Max):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
PMXB65ENEZ FAQ
1.How can I place an order for PMXB65ENEZ through Aetrix?
Please submit a Request for Quotation (RFQ) for PMXB65ENEZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PMXB65ENEZ reliable?
The price and inventory of PMXB65ENEZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PMXB65ENEZ is usually 5 days.
3.What payment methods are accepted for PMXB65ENEZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PMXB65ENEZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PMXB65ENEZ?
PMXB65ENEZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PMXB65ENEZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PMXB65ENEZ?
For technical support, including PMXB65ENEZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PMXB65ENEZ requirements.
6.How does Aetrix verify that PMXB65ENEZ is sourced from the original manufacturer or authorized distributors?
All PMXB65ENEZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PMXB65ENEZ meets industry standards.
7.What is the process for return or replacement of PMXB65ENEZ?
All PMXB65ENEZ units undergo pre-shipment inspection (PSI). If there is an issue with PMXB65ENEZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PMXB65ENEZ part is unused and in its original packaging.
Return procedure for PMXB65ENEZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PMXB65ENEZ Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

