Nexperia USA Inc. PSMN012-100YLX
- Part No.:
- PSMN012-100YLX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- SC-100, SOT-669
- Datasheet:
-
PSMN012-100YLX.pdf
- Description:
- MOSFET N-CH 100V 85A LFPAK56
- Quantity:
- Payment:

- Shipping:

Inventory:7,897
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Product details
Overview
PSMN012-100YL from Nexperia is a logic-level N-channel MOSFET with 100 V VDS, 12 mΩ RDS(on) at VGS = 5 V and 25 A, housed in an LFPAK56 (SOT669) package. It delivers high power density for synchronous rectification and battery-powered motor control, leveraging TrenchMOS technology for low gate charge and avalanche ruggedness.
For engineers reviewing the PSMN012-100YL datasheet, PSMN012-100YL pinout, PSMN012-100YL application, or PSMN012-100YL equivalent, key selection criteria include logic-level gate drive compatibility (VGS(th) typ. 1.7 V), thermal resistance (Rth(j-mb) = 0.63 K/W), and 100% avalanche-tested ruggedness for robust switching in DC-DC converters and USB-PD systems.
Technical Context
This MOSFET employs TrenchMOS architecture to achieve low RDS(on) and fast switching with QG(tot) = 64 nC and QGD = 24 nC at VGS = 5 V. Its gate threshold voltage ranges from 0.5 V (Tj = 175 °C) to 2.45 V (Tj = −55 °C), enabling reliable turn-on across industrial temperature extremes.
The LFPAK56 package integrates the mounting base (mb) directly to the drain, providing low-inductance, high-current paths and enabling 238 W total power dissipation at Tmb = 25 °C. The source-drain diode exhibits VSD = 0.81 V at IS = 25 A and Tj = 25 °C, supporting efficient body-diode conduction in half-bridge topologies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Maximum drain-source blocking voltage for 48 V bus and flyback primary-side applications |
| RDS(on) | 9.5–12 mΩ @ VGS = 5 V, ID = 25 A, Tj = 25 °C - Enables <1.2 W conduction loss at 35 A continuous current |
| ID | 85 A @ VGS = 5 V, Tmb = 25 °C - Supports high-current synchronous rectifiers without external heatsinking |
| QGD | 24 nC @ VDS = 80 V, VGS = 5 V - Low gate-drain charge minimizes Miller-induced shoot-through risk in hard-switched converters |
| Rth(j-mb) | 0.63 K/W - Enables direct PCB copper pad thermal coupling for high-power density layouts |
| EAS | 139 mJ - Single-pulse unclamped avalanche energy rating ensures reliability during inductive load switching transients |
| VGS(th) | 1.4–2.1 V @ ID = 1 mA - Logic-level threshold allows direct drive from 3.3 V/5 V microcontrollers without level-shifting |
Pinout & Package
LFPAK56 (SOT669) is a surface-mount plastic package with exposed mounting base connected to drain, optimized for high thermal and electrical performance in compact power stages.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source (S) | Three parallel source terminals reduce bond-wire inductance and improve current sharing in high-frequency switching |
| 4 | Gate (G) | Single gate input with low input capacitance (Ciss = 5980 pF) for stable 5 V logic-level drive |
| Mounting Base (mb) | Drain (D) | Exposed copper pad electrically and thermally connected to drain - serves as primary current path and heatsink interface |
Key Features
| Feature | Design Value |
|---|---|
| Logic-level gate drive | VGS(th) max 2.1 V enables direct interfacing with 3.3 V/5 V controllers - eliminates gate driver ICs in cost-sensitive designs |
| Avalanche ruggedness | 100% production-tested EAS = 139 mJ - guarantees survivability during overvoltage transients in motor drives and SMPS |
| Low RDS(on) × QG figure of merit | 12 mΩ × 64 nC = 768 mΩ·nC - balances conduction and switching losses for high-efficiency 100 kHz–500 kHz operation |
| Thermal performance | Rth(j-mb) = 0.63 K/W - supports >200 W/in² power density when mounted on ≥2 oz copper with thermal vias |
| LFPAK56 package | 4-pin Power-SO8 footprint with drain-connected mounting base - provides 3× lower thermal resistance vs. standard SO-8 |
Applications
| USB-PD Fast Charging | Synchronous Rectification |
|---|---|
Use Scenario: Primary-side switch in 65 W USB-PD AC-DC adapters with 5–20 V output regulation. IC Role / Device Role / Timing Role: High-side N-channel MOSFET controlled by PWM controller with adaptive dead-time management. Use Value: 12 mΩ RDS(on) reduces conduction loss by 35% vs. 18 mΩ alternatives, enabling >94% efficiency at full load. |
Use Scenario: Secondary-side synchronous rectifier in LLC resonant converters for server PSUs. IC Role / Device Role / Timing Role: Low-side rectifying switch driven by gate driver synchronized to transformer secondary waveform. Use Value: 0.63 K/W thermal resistance allows 85 A continuous current without forced air, reducing heatsink size by 40%. |
| Battery-Powered Motor Control | LED TV Backlight Driver |
Use Scenario: Half-bridge high-side switch in 12–24 V cordless power tool motor drivers. IC Role / Device Role / Timing Role: Logic-level N-channel MOSFET used with bootstrap gate driver for 100 kHz PWM commutation. Use Value: Avalanche rating ensures survival during motor stall events with 339 A peak current pulses. |
Use Scenario: Dimming FET in constant-current LED string drivers for 55″+ LCD TVs. IC Role / Device Role / Timing Role: PWM-controlled current sink switch operating at 1–20 kHz with fast fall time (tf = 74 ns). Use Value: Low QGD (24 nC) and fast switching minimize duty-cycle distortion and audible noise in dimming waveforms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel logic-level MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRL1404ZPBF | RDS(on) = 14 mΩ @ 5 V, QG = 72 nC, TO-220 package | Higher thermal resistance (Rth(j-c) ≈ 1.2 K/W) requires larger heatsink; not surface-mount | Prefer when through-hole assembly or legacy footprint compatibility is required |
| DMN6016LFG-7 | RDS(on) = 16.5 mΩ @ 4.5 V, SOT-23-3 package, ID = 4.5 A | Lower current rating and no avalanche rating - unsuitable for motor or high-energy transient applications | Only suitable for low-power logic-level switching where <5 A and <1 W dissipation apply |
Compared with IRL1404ZPBF and DMN6016LFG-7, PSMN012-100YL uniquely combines 100 V rating, 85 A current capability, 0.63 K/W thermal resistance, and 100% avalanche testing in a surface-mount LFPAK56 package - making it optimal for high-density, high-reliability power stages.
Availability
PSMN012-100YL is available at Aetrix Electronics and suitable for USB-PD fast charging, synchronous rectification in server PSUs, and battery-powered motor control requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for PSMN012-100YL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified and industrial-grade power MOSFETs.
This device belongs to Nexperia's LFPAK logic-level MOSFET product line, engineered specifically for high-efficiency, space-constrained power conversion in consumer, computing, and industrial equipment.
FAQ
Is PSMN012-100YL suitable for 3.3 V microcontroller gate drive?
Yes. With VGS(th) typ. 1.7 V and max 2.1 V at 25 °C, the device fully enhances at 3.3 V, delivering RDS(on) ≤ 15 mΩ. Measured RDS(on) at VGS = 3.3 V is 18.2 mΩ (typ.) per datasheet Fig. 7, confirming robust logic-level operation without gate boosting.
What is the maximum continuous drain current at 100 °C mounting base temperature?
Per Fig. 2 in the datasheet, the continuous drain current is derated to 60 A at Tmb = 100 °C with VGS = 5 V. This reflects thermal limits of the LFPAK56 package under natural convection; forced airflow or enhanced copper area can extend usable current.
Does PSMN012-100YL have integrated ESD protection?
No. The device has no built-in ESD protection diodes. Gate-source breakdown is rated at ±20 V (Table 4), and IGSS leakage is ≤100 nA at ±16 V. External gate protection (e.g., 12 V Zener clamp) is recommended in handling and layout per Nexperia application note AN10273.
Can PSMN012-100YL replace a standard SO-8 MOSFET in existing designs?
Yes - LFPAK56 (SOT669) is pin-compatible with Power-SO8 footprints but features a drain-connected mounting base instead of isolated pad. PCB layout must connect the mb pad to drain net and provide ≥4 thermal vias to inner ground/power planes for optimal thermal performance.
PSMN012-100YLX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- TrenchMOS™
- Package/Case:
- SC-100, SOT-669
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 85A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 5V, 10V
- Rds On (Max) @ Id, Vgs:
- 11.9mOhm @ 25A, 10V
- Vgs(th) (Max) @ Id:
- 2.1V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 118 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 7973 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 238W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK56, Power-SO8
PSMN012-100YLX FAQ
1.How can I place an order for PSMN012-100YLX through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN012-100YLX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN012-100YLX reliable?
The price and inventory of PSMN012-100YLX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN012-100YLX is usually 5 days.
3.What payment methods are accepted for PSMN012-100YLX?
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PSMN012-100YLX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN012-100YLX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN012-100YLX?
For technical support, including PSMN012-100YLX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN012-100YLX requirements.
6.How does Aetrix verify that PSMN012-100YLX is sourced from the original manufacturer or authorized distributors?
All PSMN012-100YLX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN012-100YLX meets industry standards.
7.What is the process for return or replacement of PSMN012-100YLX?
All PSMN012-100YLX units undergo pre-shipment inspection (PSI). If there is an issue with PSMN012-100YLX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN012-100YLX part is unused and in its original packaging.
Return procedure for PSMN012-100YLX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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