NXP Semiconductors PSMN013-100ES,127
- Part No.:
- PSMN013-100ES,127
- Manufacturer:
- NXP Semiconductors
- Category:
- FETs, MOSFETs
- Package:
- -
- Datasheet:
-
PSMN013-100ES,127.pdf
- Description:
- MOSFET N-CH 100V I2PAK
- Quantity:
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Product details
Overview
PSMN013-100ES from Nexperia is a standard-level N-channel enhancement MOSFET in I2PAK (SOT226) package, rated for 100 V drain-source voltage, 13.9 mΩ RDS(on) at VGS = 10 V and Tj = 25 °C, and 68 A continuous drain current at Tmb = 25 °C. It operates up to 175 °C junction temperature and delivers low conduction loss and fast switching for high-efficiency power conversion stages in server PSUs and motor drives.
For engineers reviewing the PSMN013-100ES datasheet, PSMN013-100ES pinout, PSMN013-100ES application, or PSMN013-100ES equivalent, key selection criteria include its 100 V VDS, 13.9 mΩ RDS(on) at 10 V gate drive, 59 nC total gate charge, 170 W power dissipation at Tmb = 25 °C, and I2PAK thermal performance with 0.5 K/W Rth(j-mb).
Technical Context
This MOSFET uses planar silicon technology with standard-level gate threshold (VGS(th) = 2–4 V typ), enabling direct drive from 5 V or 10 V logic without level shifting. Its low QG(tot) (59 nC) and QGD (17 nC) support high-frequency operation in synchronous buck converters and half-bridge topologies.
Thermally, it features a mounting-base-connected drain (mb) for low Rth(j-mb) (0.5 K/W typ), allowing efficient heat transfer to heatsinks. The integrated source-drain diode has VSD = 0.8–1.2 V at 15 A and trr = 52 ns, supporting moderate-speed freewheeling in DC-DC and motor control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Maximum blocking voltage in power switch position; suitable for 48 V input systems with margin. |
| RDS(on) | 13.9 mΩ @ VGS = 10 V, Tj = 25 °C - Enables <1.4 W conduction loss at 35 A, critical for thermal management in compact PSUs. |
| ID | 68 A @ Tmb = 25 °C - Continuous current rating limited by I2PAK package thermal capacity, not die capability. |
| QG(tot) | 59 nC @ VGS = 10 V, VDS = 50 V - Determines gate driver strength requirement; supports >500 kHz switching with appropriate driver. |
| Rth(j-mb) | 0.5 K/W typ - Enables high-power dissipation with minimal ΔT between junction and heatsink base. |
| EAS | 127 mJ - Unclamped avalanche energy rating confirms ruggedness under inductive turn-off stress in motor and relay drivers. |
| VGS(th) | 2–4 V @ Tj = 25 °C - Ensures reliable turn-on with standard logic-level gate drivers; stable across -55 to 175 °C. |
Pinout & Package
The PSMN013-100ES is housed in an I2PAK (SOT226) plastic single-ended package with TO-262 outline. The mounting base (mb) is electrically connected to the drain terminal and serves as the primary thermal path.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Control electrode; requires ≤20 V absolute max drive; 1 Ω internal AC gate resistance limits ringing. |
| 2 (D) | Drain | Main high-side power terminal; internally bonded to mounting base for low-inductance, high-current return path. |
| 3 (S) | Source | Power return reference; used for gate drive referencing and current sensing in low-side configurations. |
| mb | Mounting base | Electrically tied to drain; provides mechanical attachment and dominant thermal conduction path to heatsink. |
Key Features
| Feature | Design Value |
|---|---|
| Low RDS(on) | 13.9 mΩ at 10 V drive enables high-efficiency operation in 48 V server PSU output stages with <1.5 W loss at 35 A. |
| Fast switching | 59 nC QG(tot) and 17 nC QGD allow clean, low-loss transitions in 300–800 kHz DC-DC converters. |
| High-temperature operation | Rated to 175 °C junction temperature supports use in thermally constrained industrial enclosures without derating. |
| Avalanche ruggedness | 127 mJ EAS ensures reliable operation during unclamped inductive switching events in motor H-bridges. |
| I2PAK thermal design | 0.5 K/W Rth(j-mb) enables >100 W dissipation with modest heatsinking-critical for space-constrained load switches. |
Applications
| Server Power Supply | Industrial Motor Control |
|---|---|
Use Scenario: Primary-side synchronous rectification and secondary-side high-current OR-ing in 48 V intermediate bus architectures. IC Role / Device Role / Timing Role: High-side N-channel MOSFET switch operating at 300–600 kHz with 10 V gate drive. Use Value: 13.9 mΩ RDS(on) reduces conduction loss by >30% vs. comparable 20 mΩ devices, improving full-load efficiency by ~0.4%. |
Use Scenario: Half-bridge leg in 24–48 V brushed DC motor drivers for factory automation actuators. IC Role / Device Role / Timing Role: Low-side switching element handling bidirectional current up to 68 A peak. Use Value: 127 mJ avalanche energy rating eliminates need for external snubbers during inductive turn-off, simplifying PCB layout. |
| DC-DC Converter | Load Switching |
Use Scenario: High-current buck converter stage in telecom power modules delivering 20–50 A at 3.3/5/12 V. IC Role / Device Role / Timing Role: Synchronous rectifier with fast body diode recovery (trr = 52 ns) and low QGD. Use Value: 17 nC QGD minimizes Miller-induced shoot-through risk, enabling robust gate timing margins at 1 MHz. |
Use Scenario: Hot-swap and inrush-limited power distribution for FPGA or ASIC supply rails in embedded systems. IC Role / Device Role / Timing Role: Single-pole, high-current load switch controlled via microcontroller GPIO. Use Value: 100 V VDS rating provides headroom against transients on 48 V backplanes, ensuring long-term reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STP110N10F7 | 100 V, 11 mΩ RDS(on), 110 A ID, TO-220 package, higher QG (85 nC) | Higher current rating but larger footprint and slower switching due to higher gate charge | Prefer when board space allows TO-220 and peak current exceeds 68 A; avoid if >500 kHz operation required. |
| IRF540NPBF | 100 V, 44 mΩ RDS(on), 33 A ID, TO-220, lower cost, older process | Significantly higher conduction loss and lower thermal capability; no 175 °C rating | Acceptable only for low-duty-cycle, low-power load switching where efficiency and temperature margin are non-critical. |
Compared with STP110N10F7 and IRF540NPBF, the PSMN013-100ES offers optimal balance of low RDS(on), fast switching, and I2PAK thermal performance-making it preferred for high-density, high-efficiency 48 V power systems where board area and thermal management are constrained.
Availability
PSMN013-100ES is available at Aetrix Electronics and suitable for server power supplies, industrial motor controllers, DC-DC converters, and high-reliability load switching applications requiring stable component supply and long-term manufacturability.
Supply support for PSMN013-100ES includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in MOSFETs, ESD protection, and logic ICs for industrial and consumer markets.
The PSMN013-100ES belongs to Nexperia's standard-level power MOSFET product line, engineered for cost-sensitive yet thermally demanding applications such as communications infrastructure, industrial automation, and enterprise power systems.
FAQ
What is the maximum continuous drain current rating for PSMN013-100ES?
The PSMN013-100ES has a maximum continuous drain current (ID) of 68 A at mounting base temperature (Tmb) = 25 °C. This rating is package-limited-not die-limited-and decreases to 47 A at Tmb = 100 °C per Figure 1 in the datasheet. Derating must follow the normalized curve in Figure 1 for real-world thermal conditions.
Does PSMN013-100ES support 5 V gate drive?
No-PSMN013-100ES is a standard-level MOSFET with VGS(th) = 2–4 V typ, but its RDS(on) is specified at VGS = 10 V (13.9 mΩ). At 5 V gate drive, RDS(on) rises significantly (>50 mΩ), increasing conduction loss. It requires 10 V gate drive for full performance; a gate driver or level shifter is recommended for logic-level MCU interfaces.
What is the thermal resistance from junction to mounting base for PSMN013-100ES?
The PSMN013-100ES has a typical thermal resistance from junction to mounting base (Rth(j-mb)) of 0.5 K/W, with a maximum of 0.9 K/W. This low value reflects the I2PAK package's metal mounting base directly connected to the drain, enabling efficient heat transfer to external heatsinks without thermal interface material dependency.
Is PSMN013-100ES suitable for avalanche operation?
Yes-the PSMN013-100ES is rated for non-repetitive drain-source avalanche energy (EAS) of 127 mJ under defined conditions (VGS = 10 V, ID = 68 A, Vsup ≤ 100 V, unclamped, RGS = 50 Ω). This makes it suitable for inductive load switching in motor control and relay drivers where controlled avalanche may occur during turn-off.
What is the gate charge profile of PSMN013-100ES?
The PSMN013-100ES has a total gate charge (QG(tot)) of 59 nC at VGS = 10 V, VDS = 50 V, and ID = 25 A. Its gate-drain charge (QGD) is 17 nC, and gate-source plateau voltage (VGS(pl)) is 4.4 V. These values confirm suitability for high-frequency switching with minimized Miller effect and predictable drive requirements.
PSMN013-100ES,127 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Active
- FET Type:
- -
- Technology:
- -
- Drain to Source Voltage (Vdss):
- -
- Current - Continuous Drain (Id) @ 25°C:
- -
- Drive Voltage (Max Rds On, Min Rds On):
- -
- Rds On (Max) @ Id, Vgs:
- -
- Vgs(th) (Max) @ Id:
- -
- Gate Charge (Qg) (Max) @ Vgs:
- -
- Vgs (Max):
- -
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- FET Feature:
- -
- Power Dissipation (Max):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
PSMN013-100ES,127 FAQ
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7.What is the process for return or replacement of PSMN013-100ES,127?
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1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN013-100ES,127 part is unused and in its original packaging.
Return procedure for PSMN013-100ES,127:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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