Nexperia USA Inc. PSMN013-60HLX
- Part No.:
- PSMN013-60HLX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FET, MOSFET Arrays
- Package:
- SOT-1205, 8-LFPAK56
- Datasheet:
-
PSMN013-60HLX.pdf
- Description:
- MOSFET 2N-CH 60V 40A LFPAK56D
- Quantity:
- Payment:

- Shipping:

Inventory:1,590
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Product details
Overview
PSMN013-60HL from Nexperia is a dual N-channel logic-level MOSFET in LFPAK56D (SOT1205) package, rated 60 V VDS, 12.5 mΩ RDS(on) @ 5 V VGS, and 40 A continuous drain current at Tmb = 25 °C - designed for high-efficiency synchronous rectification and BLDC motor half-bridge legs.
For engineers reviewing the PSMN013-60HL datasheet, PSMN013-60HL pinout, PSMN013-60HL application, or PSMN013-60HL equivalent, this page delivers verified electrical specs, dual-FET terminal mapping, thermal resistance (Rth(j-mb) = 2.36 K/W), avalanche energy rating (82 mJ), and real-world use context in server power and motor control.
Technical Context
This dual MOSFET integrates two identical N-channel TrenchMOS devices in a single copper-clip LFPAK56D package, enabling compact half-bridge or dual-switch topologies without discrete pairing. Each FET shares independent gate and source terminals but shares common drain pads (D1/D2 doubled per side).
It operates with logic-level gate drive (VGS(th) typ. 1.7 V, max 2.45 V at −55 °C), supports repetitive avalanche (rated per IEC 60134), and is qualified to 175 °C junction temperature with solder die attach and copper-clip interconnect for low parasitic inductance and high thermal conductivity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 60 V - Maximum blocking voltage for DC-to-DC converters up to 48 V bus systems with margin. |
| RDS(on) | 12.5 mΩ @ VGS = 5 V, Tj = 25 °C - Enables <1 W conduction loss at 28 A, critical for high-efficiency server PSU designs. |
| ID | 40 A continuous @ Tmb = 25 °C - Limited by package thermal capacity, not silicon; derates to 33 A at Tmb = 100 °C. |
| EAS | 82 mJ non-repetitive avalanche energy - Supports unclamped inductive switching in BLDC motor phases without external snubbers. |
| QG(tot) | 22.4 nC - Low gate charge enables fast switching with modest 5 V gate drivers, reducing driver losses in high-frequency operation. |
| Rth(j-mb) | 2.36 K/W - Junction-to-mounting-base thermal resistance confirms direct thermal path via copper clip, essential for heatsink-integrated PCB layouts. |
| Ciss | 2953 pF max - Input capacitance impacts gate drive strength requirements and EMI filtering design in hard-switched topologies. |
Pinout & Package
LFPAK56D (SOT1205) is a dual-power SO8 variant with copper-clip construction, 8-pin surface-mount footprint, and exposed mounting base for low-inductance, high-current routing. Dimensions: 4.95 × 5.30 × 1.02 mm (L × W × H), with 1.27 mm pitch and 3.5 mm² thermal pad area.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | S1 | Source terminal of FET1 - referenced to low-side switch node in half-bridge configuration. |
| 2 | G1 | Gate terminal of FET1 - requires dedicated 5 V logic-level drive with <22.4 nC total charge. |
| 3 | S2 | Source terminal of FET2 - electrically isolated from S1; used for independent low-side control or dual-phase sync rectification. |
| 4 | G2 | Gate terminal of FET2 - fully independent gate control enables asymmetric PWM or phase-shifted operation. |
| 5 & 6 | D2 | Shared drain pad for FET2 - double-pad layout improves current sharing and reduces bond-wire inductance. |
| 7 & 8 | D1 | Shared drain pad for FET1 - symmetric dual-drain structure supports balanced thermal distribution under load. |
Key Features
| Feature | Design Value |
|---|---|
| Dual N-channel integration | Two matched 60 V/12.5 mΩ MOSFETs in one LFPAK56D package - eliminates layout mismatch, reduces PCB area by >40% vs. discrete pairs. |
| Repetitive avalanche rating | Rated for repeated unclamped inductive switching (per Fig. 4) - enables robust BLDC motor phase-leg operation without external protection diodes. |
| Copper-clip die attach | Reduces Rth(j-mb) to 2.36 K/W and lowers package inductance - improves thermal response and EMI performance in high-dI/dt applications. |
| 175 °C qualification | Full specification guaranteed up to Tj = 175 °C - supports high-ambient industrial and server environments with sustained power density. |
| Logic-level gate threshold | VGS(th) max 2.45 V at −55 °C - ensures turn-on with standard 3.3 V or 5 V microcontroller GPIO, eliminating level-shifter need. |
Applications
| Brushless DC Motor Control | High-Efficiency Server PSU |
|---|---|
|
Use Scenario: Half-bridge leg in 24–48 V BLDC drives for cooling fans and pumps. IC Role / Device Role / Timing Role: Dual-FET replaces two discrete MOSFETs in upper/lower switch positions; leverages shared thermal base for balanced junction temperature. Use Value: 12.5 mΩ RDS(on) cuts conduction loss by 35% vs. legacy 19 mΩ parts, extending fan runtime and reducing heatsink size. |
Use Scenario: Synchronous rectifier in LLC resonant converter output stage of 1U server PSUs. IC Role / Device Role / Timing Role: FET1 and FET2 operate in parallel per phase to handle >30 A output current with interleaved gate timing. Use Value: 2.36 K/W Rth(j-mb) enables 64 W dissipation on standard 2-oz copper, avoiding forced-air cooling in dense 1U chassis. |
| DC-to-DC Buck Converter | High-Performance Synchronous Rectification |
|
Use Scenario: High-current 12 V → 1.2 V point-of-load (POL) converter for CPU/GPU VRMs. IC Role / Device Role / Timing Role: FET1 as high-side switch, FET2 as low-side switch - independent gates allow dead-time optimization and shoot-through prevention. Use Value: QG(tot) = 22.4 nC allows <50 ns switching transitions with 1 A gate drivers, minimizing switching loss at 500 kHz–1 MHz. |
Use Scenario: Secondary-side rectification in telecom 48 V input isolated DC-DC modules. IC Role / Device Role / Timing Role: Dual-FET configured as back-to-back sources for bidirectional current handling in active clamp forward topologies. Use Value: 18.9 nC Qr and 22.7 ns trr minimize reverse recovery loss, improving efficiency by 0.8% over Si Schottky alternatives at 100 kHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon BSC014N06LS | Single 60 V/1.4 mΩ MOSFET in SuperSO8; no dual integration - requires two devices for same function. | Lacks integrated dual topology; higher layout complexity and thermal asymmetry in half-bridge use. | Choose only if needing lower RDS(on) per FET and willing to manage dual-device layout and thermal coupling. |
| Vishay SI7850DP | Dual 60 V/13.5 mΩ in PowerPAK SO-8; uses wire-bond die attach - Rth(j-mb) = 3.2 K/W, higher than PSMN013-60HL's 2.36 K/W. | Lower thermal performance limits power density in space-constrained server applications. | Select when cost sensitivity outweighs thermal performance, and board-level heatsinking is less aggressive. |
Compared with BSC014N06LS and SI7850DP, PSMN013-60HL uniquely combines dual-FET integration, copper-clip thermal path, and logic-level drive in one package - delivering superior power density and reliability for thermally demanding BLDC and server PSU designs without layout compromise.
Availability
PSMN013-60HL is available at Aetrix Electronics and suitable for brushless DC motor control, high-efficiency server power supplies, and high-performance synchronous rectification requiring stable component supply across extended production lifecycles.
Supply support for PSMN013-60HL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in MOSFETs, ESD protection, and logic ICs for automotive, industrial, and computing markets.
PSMN013-60HL belongs to Nexperia's TrenchMOS logic-level dual-FET product line, engineered specifically for space-constrained, thermally aggressive power conversion and motor drive applications where integration, ruggedness, and 5 V drive compatibility are mandatory.
FAQ
What is the maximum continuous drain current for PSMN013-60HL at 100 °C mounting base temperature?
The maximum continuous drain current is 33 A at Tmb = 100 °C, as specified in Table 5 (Limiting Values) and confirmed by Fig. 2. This derating reflects thermal limits of the LFPAK56D package, not silicon capability - the device remains fully functional up to its 175 °C junction limit.
Can PSMN013-60HL be used in avalanche mode repeatedly?
Yes - it is explicitly rated for repetitive avalanche operation per Figure 4 and Section 2 features. The device sustains controlled avalanche events up to 82 mJ (single-pulse) and supports repetitive conditions within the safe operating area defined by Tj ≤ 175 °C and time-limited current profiles.
How are the drain pins (5/6 and 7/8) electrically connected internally?
Pins 5 and 6 are bonded together as the D2 terminal for FET2; pins 7 and 8 are bonded together as the D1 terminal for FET1. These are physically separate copper pads on the LFPAK56D leadframe - not shorted - enabling independent drain routing and optimized current path symmetry in PCB layout.
Is the RDS(on) value of 12.5 mΩ guaranteed at 175 °C junction temperature?
No - 12.5 mΩ is the typical value at Tj = 25 °C. At Tj = 175 °C, RDS(on) rises to 28.3 mΩ (max), as shown in Table 1 and Table 7. Designers must use the elevated value for worst-case conduction loss calculation in high-temperature environments.
PSMN013-60HLX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-1205, 8-LFPAK56
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- MOSFET (Metal Oxide)
- Configuration:
- 2 N-Channel (Dual)
- FET Feature:
- -
- Drain to Source Voltage (Vdss):
- 60V
- Current - Continuous Drain (Id) @ 25°C:
- 40A (Ta)
- Rds On (Max) @ Id, Vgs:
- 12.5mOhm @ 10A, 5V
- Vgs(th) (Max) @ Id:
- 2.1V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 22.4nC @ 5V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2953pF @ 25V
- Power - Max:
- 64W (Ta)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK56D
PSMN013-60HLX FAQ
1.How can I place an order for PSMN013-60HLX through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN013-60HLX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN013-60HLX reliable?
The price and inventory of PSMN013-60HLX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN013-60HLX is usually 5 days.
3.What payment methods are accepted for PSMN013-60HLX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN013-60HLX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN013-60HLX?
PSMN013-60HLX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN013-60HLX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN013-60HLX?
For technical support, including PSMN013-60HLX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN013-60HLX requirements.
6.How does Aetrix verify that PSMN013-60HLX is sourced from the original manufacturer or authorized distributors?
All PSMN013-60HLX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN013-60HLX meets industry standards.
7.What is the process for return or replacement of PSMN013-60HLX?
All PSMN013-60HLX units undergo pre-shipment inspection (PSI). If there is an issue with PSMN013-60HLX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN013-60HLX part is unused and in its original packaging.
Return procedure for PSMN013-60HLX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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2N7002BKS,115
Nexperia USA Inc.

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