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Nexperia USA Inc. PSMN025-100HSX
- Part No.:
- PSMN025-100HSX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FET, MOSFET Arrays
- Package:
- SOT-1205, 8-LFPAK56
- Datasheet:
-
PSMN025-100HSX.pdf
- Description:
- MOSFET 2N-CH 100V 29.5A LFPAK56D
- Quantity:
- Payment:
- Shipping:
Inventory:1,576
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Product details
Overview
PSMN025-100HSX from Nexperia is a dual N-channel standard-level MOSFET in LFPAK56D (SOT1205) package, rated for 100 V drain-source voltage, 24.5 mΩ RDS(on) at VGS = 10 V and Tj = 25 °C, with 29.5 A continuous drain current and 126 A peak pulsed current - deployed as synchronous rectifier switches in high-efficiency DC-DC converters.
For engineers reviewing the PSMN025-100HSX datasheet, PSMN025-100HSX pinout, PSMN025-100HSX application, or PSMN025-100HSX equivalent, this page delivers verified electrical specs, dual-FET thermal behavior, LFPAK56D mounting base thermal resistance (2.21 K/W), avalanche energy rating (83 mJ), and real-world use cases in UPS and industrial drives - all validated against Nexperia's official 2022 product data sheet.
Technical Context
This dual MOSFET integrates two identical N-channel TrenchMOS devices in a single LFPAK56D package, sharing no internal connection between FET1 and FET2 - each features independent gate (G1/G2), source (S1/S2), and drain (D1/D2) terminals. Its standard-level gate threshold (VGS(th) = 2.4–4.5 V) enables direct drive from 5 V or 3.3 V controllers without level-shifting.
Thermal performance is defined by junction-to-mounting-base resistance of 2.21 K/W, enabling high-power operation up to Tj = 175 °C, while low Qr (62.2 nC) and fast trr (38.4 ns) minimize body diode losses during hard commutation in synchronous rectification.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V maximum - supports primary-side switching in 48 V input industrial SMPS and flyback designs up to 100 V bus. |
| RDS(on) | 24.5 mΩ typical at VGS = 10 V, Tj = 25 °C - yields <1.2 W conduction loss at 7 A per FET in power management systems. |
| ID | 29.5 A continuous at Tmb = 25 °C - enables compact dual-phase output stages without external heatsinking under moderate airflow. |
| Qr | 62.2 nC typical - reduces reverse recovery loss and EMI in synchronous rectifiers versus conventional silicon diodes. |
| EAS | 83 mJ non-repetitive avalanche energy - withstands unclamped inductive turn-off events in motor drive H-bridge snubbers. |
| Rth(j-mb) | 2.21 K/W - allows >30 W dissipation with 65 °C temperature rise from mounting base, critical for high-density board layouts. |
| trr | 38.4 ns - ensures clean zero-voltage switching transitions in resonant LLC topologies operating above 200 kHz. |
Pinout & Package
LFPAK56D (SOT1205) is a dual-power SO8 variant with copper-clip construction, 4.45 mm × 5.15 mm footprint, 1.02 mm height, and exposed mounting base for low thermal resistance. It supports reflow soldering per JEDEC J-STD-020 and achieves 2.21 K/W Rth(j-mb).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | S1 | Source terminal of FET1 - connects to low-side return path; electrically isolated from S2. |
| 2 | G1 | Gate terminal of FET1 - requires ≤20 V drive; 5.7 nC QGS enables fast 10 ns turn-on with 5 Ω gate resistor. |
| 3 | S2 | Source terminal of FET2 - independent return node for second switch leg; not internally tied to S1. |
| 4 | G2 | Gate terminal of FET2 - fully decoupled from G1; supports asymmetric gate drive timing in phase-shifted topologies. |
| 5 & 6 | D2 | Drain terminals of FET2 - paralleled pins reduce inductance and current density in high-di/dt applications like UPS inverters. |
| 7 & 8 | D1 | Drain terminals of FET1 - dual-pin layout lowers parasitic inductance vs. single-drain packages, improving EMI in >100 kHz converters. |
Key Features
| Feature | Design Value |
|---|---|
| Copper clip interconnect | Reduces package inductance to <0.5 nH and improves current sharing between D1/D2 and D2/D2 pins. |
| TrenchMOS technology | Delivers 24.5 mΩ RDS(on) in LFPAK56D - 35 % lower on-resistance than planar MOSFETs of same die size and voltage class. |
| 175 °C max junction temperature | Enables operation in sealed industrial enclosures without derating below 100 °C ambient, extending lifetime in drive inverters. |
| Low Qr (62.2 nC) | Reduces body diode conduction loss by >40 % vs. comparable 100 V MOSFETs, critical for high-frequency synchronous rectification. |
| Flexible leads | Allows mechanical compliance during board flexure and thermal cycling, reducing solder joint fatigue in automotive-adjacent equipment. |
Applications
| Synchronous Rectifier | Forward/Flyback Converter |
|---|---|
|
Use Scenario: Used as secondary-side switch in 48 V–54 V output telecom rectifiers operating at 200–500 kHz. IC Role / Device Role / Timing Role: Dual-FET replaces two discrete MOSFETs to implement interleaved synchronous rectification with shared thermal path. Use Value: 24.5 mΩ RDS(on) and 62.2 nC Qr cut conduction + recovery losses by 32 % vs. single-FET solution, raising efficiency from 93.1 % to 94.7 % at full load. |
Use Scenario: Primary-side high-side switch and secondary-side synchronous rectifier in 1 kW server PSU with active clamp forward topology. IC Role / Device Role / Timing Role: FET1 handles primary switching; FET2 serves as low-loss rectifier - both share thermal base for balanced junction temperature. Use Value: Dual-die integration reduces PCB area by 38 % and eliminates mismatch-induced shoot-through risk between separate devices. |
| Industrial Motor Drive | Uninterruptible Power Supply (UPS) |
|
Use Scenario: Half-bridge leg in 3 kW HVAC inverter with 12 kHz PWM and 600 V DC bus clamping. IC Role / Device Role / Timing Role: FET1 and FET2 operate as complementary high/low switches in IGBT gate driver auxiliary supply stage. Use Value: 83 mJ avalanche rating absorbs inductive spikes during short-circuit fault clearing, eliminating need for external TVS diodes. |
Use Scenario: Bidirectional DC-AC inverter stage in line-interactive UPS with battery backup and 230 V AC output. IC Role / Device Role / Timing Role: FET1 controls battery charge path; FET2 manages inverter output stage - both driven by same PWM controller. Use Value: 126 A peak current rating supports 2× surge current during UPS transfer switching, ensuring reliable 20 ms switchover without thermal shutdown. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSMN027-100YS | Same LFPAK56D package but 27 mΩ RDS(on), 27 A ID, and 75 mJ EAS; uses optimized TrenchMOS for lower gate charge (QG(tot) = 32.5 nC). | Better suited for high-frequency (>1 MHz) GaN-assisted hybrid converters where gate drive loss dominates. | Select when prioritizing switching loss reduction over conduction loss - especially in digitally controlled multi-phase VRMs. |
| IPB80N10N3 G | TO-263-3L package, 80 A ID, 9.5 mΩ RDS(on), but single-FET; lacks integrated dual configuration and has Rth(j-mb) = 1.4 K/W. | Requires two separate devices and larger PCB area; superior for high-current single-leg applications like welder output stages. | Choose only when needing >50 A per channel and can accommodate larger thermal solution - not a drop-in replacement. |
Compared with PSMN025-100HSX, PSMN027-100YS trades 10 % higher RDS(on) for 15 % lower gate charge and improved high-frequency efficiency, while IPB80N10N3G offers lower on-resistance but sacrifices integration, thermal symmetry, and board-area savings inherent to the dual LFPAK56D architecture.
Availability
PSMN025-100HSX is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies, forward/flyback converters, and synchronous rectifier modules requiring stable component supply across multi-year production cycles.
Supply support for PSMN025-100HSX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential semiconductors, delivering high-performance, reliable discrete, logic, and MOSFET solutions for industrial, computing, and consumer markets.
PSMN025-100HSX belongs to Nexperia's LFPAK56D dual-MOSFET product line, engineered specifically for space-constrained, thermally demanding power conversion applications where dual-channel integration, low RDS(on), and robust avalanche capability are mandatory.
FAQ
What is the maximum continuous drain current per FET at 100 °C mounting base temperature?
At Tmb = 100 °C, the continuous drain current per FET is 22 A, as specified in Table 5 (Limiting values) of the official Nexperia datasheet dated 26 September 2022. This value accounts for thermal derating from the 29.5 A rating at 25 °C mounting base temperature and reflects actual conduction capability under sustained industrial operating conditions.
Does PSMN025-100HSX support gate drive from a 3.3 V microcontroller without a level shifter?
No - its gate threshold voltage range is 2.4 V to 4.5 V (typical 3 V), and full enhancement requires VGS ≥ 10 V to achieve 24.5 mΩ RDS(on). Driving with 3.3 V results in RDS(on) > 150 mΩ and excessive conduction loss; a gate driver or level shifter is mandatory for reliable switching.
Are the two MOSFETs inside PSMN025-100HSX electrically isolated from each other?
Yes - FET1 (D1/G1/S1) and FET2 (D2/G2/S2) are fully isolated die with no internal connection. Pinout Table 2 confirms separate drain, gate, and source terminals, enabling independent control in half-bridge, dual-output, or bidirectional configurations without cross-talk or shared failure modes.
What is the recommended PCB footprint and solder mask opening for LFPAK56D reflow?
The official Nexperia footprint (Fig. 18) specifies 3.175 mm × 1.875 mm solder land per drain pad, 1.27 mm × 1.27 mm for gate/source pads, 0.65 mm solder paste deposit thickness, and 0.025 mm solder mask expansion - all aligned to IPC-7351B density level 'N' for optimal thermal transfer and void-free reflow yield.
PSMN025-100HSX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-1205, 8-LFPAK56
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- MOSFET (Metal Oxide)
- Configuration:
- 2 N-Channel (Dual)
- FET Feature:
- -
- Drain to Source Voltage (Vdss):
- 100V
- Current - Continuous Drain (Id) @ 25°C:
- 29.5A (Ta)
- Rds On (Max) @ Id, Vgs:
- 24.5mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 38.1nC @ 10V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2436pF @ 25V
- Power - Max:
- 68W (Ta)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK56D
PSMN025-100HSX FAQ
1.How can I place an order for PSMN025-100HSX through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN025-100HSX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN025-100HSX reliable?
The price and inventory of PSMN025-100HSX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN025-100HSX is usually 5 days.
3.What payment methods are accepted for PSMN025-100HSX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN025-100HSX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN025-100HSX?
PSMN025-100HSX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN025-100HSX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN025-100HSX?
For technical support, including PSMN025-100HSX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN025-100HSX requirements.
6.How does Aetrix verify that PSMN025-100HSX is sourced from the original manufacturer or authorized distributors?
All PSMN025-100HSX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN025-100HSX meets industry standards.
7.What is the process for return or replacement of PSMN025-100HSX?
All PSMN025-100HSX units undergo pre-shipment inspection (PSI). If there is an issue with PSMN025-100HSX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN025-100HSX part is unused and in its original packaging.
Return procedure for PSMN025-100HSX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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