Nexperia USA Inc. PSMN033-100HLX
- Part No.:
- PSMN033-100HLX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FET, MOSFET Arrays
- Package:
- SOT-1205, 8-LFPAK56
- Datasheet:
-
PSMN033-100HLX.pdf
- Description:
- MOSFET 2N-CH 100V 26A LFPAK56D
- Quantity:
- Payment:

- Shipping:

Inventory:1,578
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Product details
Overview
PSMN033-100HL from Nexperia is a dual N-channel logic-level MOSFET in LFPAK56D (SOT1205) package, rated for 100 V VDS, 31 mΩ RDS(on) at VGS = 10 V and Tj = 25 °C, and 73.4 mΩ at VGS = 5 V and Tj = 175 °C. It delivers 26 A continuous drain current at Tmb = 25 °C and supports synchronous rectification and high-efficiency DC-DC conversion in industrial power supplies.
For engineers reviewing the PSMN033-100HL datasheet, PSMN033-100HL pinout, PSMN033-100HL application, or PSMN033-100HL equivalent, key selection criteria include dual-FET integration in a single LFPAK56D footprint, low Qr (47.3 nC) for reduced switching loss in hard-switched topologies, and 175 °C maximum junction temperature for high-reliability thermal operation.
Technical Context
This dual MOSFET integrates two independent N-channel TrenchMOS devices sharing a common mounting base, enabling compact half-bridge or dual-phase configurations without discrete paralleling. Its LFPAK56D package uses copper clip bonding and flexible leads to achieve low Rth(j-mb) of 2.36 K/W and high peak drain current (IDM = 106 A).
The device features logic-level gate drive compatibility (VGS(th) = 1.4–2.1 V typ), low reverse recovery charge (Qr = 47.3 nC), and avalanche ruggedness (EAS = 74 mJ), making it suitable for flyback, forward, and synchronous rectifier circuits where body diode performance and thermal robustness are critical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Maximum blocking voltage for primary-side switching in 48 V–96 V input systems |
| RDS(on) @ VGS = 10 V, Tj = 25 °C | 25.6 mΩ typ - Enables <1.3 W conduction loss at 9 A, supporting high-efficiency power stages |
| RDS(on) @ VGS = 5 V, Tj = 175 °C | 73.4 mΩ typ - Ensures reliable logic-level drive under worst-case thermal conditions |
| Qr | 47.3 nC - Reduces body diode switching loss and EMI in synchronous rectifiers |
| ID continuous @ Tmb = 25 °C | 26 A - Supports >200 W output in compact board space with standard thermal pads |
| Rth(j-mb) | 2.36 K/W - Enables direct thermal coupling to heatsink or PCB copper, improving power density |
| EAS | 74 mJ - Withstands single-pulse inductive energy during overcurrent events without failure |
Pinout & Package
LFPAK56D (SOT1205) is a dual-power SO-8 variant with exposed mounting base, optimized for high-current, low-inductance operation. It features copper clip interconnects and flexible leads for mechanical stress relief and enhanced thermal transfer.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | S1 | Source terminal for FET1 - connects to low-side return path in half-bridge configuration |
| 2 | G1 | Gate terminal for FET1 - requires <5 V logic-compatible drive with 27.3 nC total gate charge |
| 3 | S2 | Source terminal for FET2 - electrically isolated from S1; enables independent source referencing |
| 4 | G2 | Gate terminal for FET2 - fully independent control; supports asymmetric or interleaved drive schemes |
| 5, 6 | D2 | Drain terminals for FET2 - paralleled internally for lower inductance and higher current handling |
| 7, 8 | D1 | Drain terminals for FET1 - paralleled internally; shares mounting base with D2 for thermal uniformity |
Key Features
| Feature | Design Value |
|---|---|
| Dual-FET integration in single LFPAK56D | Reduces PCB area by ~40% vs. two discrete SO-8 MOSFETs while maintaining isolation between source nodes |
| Copper clip + flexible leads | Lowers parasitic inductance (<1.5 nH per drain loop) and improves thermal cycling reliability beyond standard wire-bond packages |
| 175 °C max junction temperature | Enables operation in sealed enclosures or high-ambient environments without derating below 100% load |
| Low Qr (47.3 nC) | Minimizes reverse recovery loss and associated voltage overshoot in synchronous rectifier applications |
| TrenchMOS technology | Delivers stable RDS(on) over temperature and superior dv/dt immunity compared to planar MOSFETs |
Applications
| Synchronous Rectifier | Forward Converter |
|---|---|
Use Scenario: Secondary-side rectification in isolated 48 V telecom PSUs with <1% efficiency target. IC Role / Device Role / Timing Role: Dual-FET replaces two discrete Schottky diodes; FET1 handles main output, FET2 supports auxiliary rail or current sharing. Use Value: Achieves >95% full-load efficiency due to 25.6 mΩ RDS(on) and 47.3 nC Qr, reducing conduction and switching losses versus diode-based designs. |
Use Scenario: Primary-side switch and synchronous rectifier in 200–500 W industrial forward converters. IC Role / Device Role / Timing Role: FET1 operates as main PWM switch; FET2 functions as controlled rectifier on secondary side with precise gate timing. Use Value: Dual integration eliminates layout mismatch between switches, improving cross-regulation and reducing EMI from gate loop asymmetry. |
| Flyback Converter | Uninterruptible Power Supply (UPS) |
Use Scenario: High-density 60–120 W flyback with active clamp or quasi-resonant topology. IC Role / Device Role / Timing Role: FET1 serves as main power switch; FET2 acts as active clamp switch or synchronous rectifier in secondary winding. Use Value: Low QGD (11 nC) and fast turn-off delay (39.5 ns) enable tight dead-time control and minimize overlap loss. |
Use Scenario: Inverter stage and battery charging circuitry in line-interactive UPS systems. IC Role / Device Role / Timing Role: FET1 manages AC/DC conversion; FET2 controls bidirectional battery interface with reverse current blocking. Use Value: 100 V rating and 175 °C Tj support wide input range (90–264 VAC) and extended runtime under elevated ambient temperatures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NX3008PBK | Single-channel 100 V, 30 mΩ LFPAK56; no dual-FET integration | Requires two devices for same functionality; increases layout area and gate drive complexity | Choose when independent thermal management or asymmetric FET sizing is required |
| PSMN1R0-100BSE | Single-channel 100 V, 1.0 mΩ; TO-220FP package; higher RDS(on) at logic-level drive | Not logic-level compatible; needs 10 V gate drive; unsuitable for 3.3 V controller interfaces | Prefer only for high-current, low-frequency applications where gate drive voltage ≥10 V is available |
Compared with NX3008PBK and PSMN1R0-100BSE, PSMN033-100HL uniquely combines dual-FET integration, logic-level drive capability, and low Qr in a thermally efficient LFPAK56D package-enabling compact, high-efficiency synchronous rectification without compromising layout simplicity or thermal margin.
Availability
PSMN033-100HL is available at Aetrix Electronics and suitable for industrial drives, uninterruptible power supplies, and forward/flyback converters requiring stable component supply across multi-year production cycles.
Supply support for PSMN033-100HL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic components, with leadership in MOSFETs, diodes, and ESD protection devices.
This part belongs to Nexperia's TrenchMOS logic-level dual-FET product line, engineered specifically for space-constrained, high-efficiency power conversion in industrial and telecom infrastructure applications.
FAQ
What is the maximum safe operating temperature for PSMN033-100HL?
The absolute maximum junction temperature is 175 °C, and the storage temperature range is –55 °C to +175 °C. Thermal design must ensure Rth(j-mb) = 2.36 K/W is maintained via proper mounting base contact; exceeding 175 °C risks permanent parametric shift and bond wire degradation.
Can PSMN033-100HL be driven directly by a 3.3 V microcontroller GPIO?
No. While VGS(th) starts at 1.4 V, RDS(on) rises sharply below 4.5 V - at VGS = 3.3 V and Tj = 25 °C, RDS(on) exceeds 60 mΩ. Reliable operation requires ≥4.5 V gate drive; a dedicated level-shifting driver or gate driver IC is recommended for 3.3 V controllers.
How does the dual-drain pin configuration (pins 5+6 and 7+8) affect PCB layout?
Pins 5 & 6 are internally paralleled D2 terminals; pins 7 & 8 are internally paralleled D1 terminals. This dual-pin arrangement reduces package inductance and improves current sharing - PCB layout should use symmetric, equal-length traces to both drain pins and avoid stubs to maintain low EMI and thermal balance.
Is PSMN033-100HL automotive qualified?
No. This device is not AEC-Q101 qualified and lacks automotive-specific testing or qualification documentation. It is intended for industrial, telecom, and consumer power applications only; use in automotive systems requires formal validation and is not supported by Nexperia's warranty or reliability data.
PSMN033-100HLX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-1205, 8-LFPAK56
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- MOSFET (Metal Oxide)
- Configuration:
- 2 N-Channel (Dual)
- FET Feature:
- Logic Level Gate
- Drain to Source Voltage (Vdss):
- 100V
- Current - Continuous Drain (Id) @ 25°C:
- 26A (Ta)
- Rds On (Max) @ Id, Vgs:
- 31mOhm @ 5A, 10V
- Vgs(th) (Max) @ Id:
- 2.1V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 27.3nC @ 5V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3168pF @ 25V
- Power - Max:
- 64W (Ta)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK56D
PSMN033-100HLX FAQ
1.How can I place an order for PSMN033-100HLX through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN033-100HLX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN033-100HLX reliable?
The price and inventory of PSMN033-100HLX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN033-100HLX is usually 5 days.
3.What payment methods are accepted for PSMN033-100HLX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN033-100HLX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN033-100HLX?
PSMN033-100HLX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN033-100HLX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN033-100HLX?
For technical support, including PSMN033-100HLX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN033-100HLX requirements.
6.How does Aetrix verify that PSMN033-100HLX is sourced from the original manufacturer or authorized distributors?
All PSMN033-100HLX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN033-100HLX meets industry standards.
7.What is the process for return or replacement of PSMN033-100HLX?
All PSMN033-100HLX units undergo pre-shipment inspection (PSI). If there is an issue with PSMN033-100HLX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN033-100HLX part is unused and in its original packaging.
Return procedure for PSMN033-100HLX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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