My Inquiry
My Account
Nexperia USA Inc. PSMN1R3-100ASFJ
- Part No.:
- PSMN1R3-100ASFJ
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- 12-BESOP (0.370", 9.40mm Width), Exposed Pad
- Datasheet:
-
PSMN1R3-100ASFJ.pdf
- Description:
- NEXTPOWER 100 V, 1.3 MOHM, N-CHA
- Quantity:
- Payment:
- Shipping:
Inventory:7,401
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PSMN1R3-100ASF from Nexperia is a 100 V, 1.3 mΩ N-channel MOSFET in the CCPAK1212 (SOT8000A) copper-clip package, rated for continuous drain current up to 355 A at Tmb = 25 °C and qualified for operation up to 175 °C junction temperature. It delivers low QG × RDS(on) figure-of-merit (FOM), strong avalanche ruggedness (EAS = 1126 mJ), and low reverse recovery charge (Qr = 74 nC), making it suitable for high-efficiency, high-current switching in BLDC motor inverters and battery protection circuits.
For engineers reviewing the PSMN1R3-100ASF datasheet, PSMN1R3-100ASF pinout, PSMN1R3-100ASF application, or PSMN1R3-100ASF equivalent, key selection criteria include its 1.3 mΩ RDS(on) at VGS = 10 V and Tj = 25 °C, 355 A continuous current capability with mounting-base thermal management, JEDEC-qualified CCPAK1212 package for second-source compatibility, and 100% avalanche-tested ruggedness.
Technical Context
This NextPower MOSFET employs a trench-gate superjunction structure optimized for low conduction and switching losses in hard-switched industrial power stages. Its gate threshold voltage (VGS(th)) ranges from 2.0 V to 4.0 V at 25 °C and exhibits a negative temperature coefficient (–9.32 mV/K), enabling inherent current sharing in paralleled configurations.
The device integrates a robust body diode with low VSD (0.76 V typ. at IS = 25 A, Tj = 25 °C) and fast reverse recovery (trr = 62 ns), supporting efficient synchronous rectification and OR-ing applications without external Schottky diodes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Maximum blocking voltage for 48 V–72 V bus systems with safety margin |
| RDS(on) | 1.02–1.3 mΩ @ VGS = 10 V, ID = 25 A, Tj = 25 °C - Enables <1.3 W conduction loss at 100 A |
| ID(cont) | 355 A @ Tmb = 25 °C - Requires PCB copper area ≥25.4 mm² and thermal interface to heatsink |
| Qr | 74 nC @ IS = 25 A, dIS/dt = –100 A/µs - Reduces diode-induced voltage spikes in half-bridge freewheeling |
| EAS | 1126 mJ @ IAS = 99 A, unclamped - Supports single-pulse inductive load energy absorption without failure |
| Rth(j-mb) | 0.123–0.16 K/W - Enables >900 W dissipation with <15 K rise from mounting base to junction |
| QG(tot) | 128–383 nC @ VDS = 50 V, ID = 25 A - Dictates gate driver peak current requirement (~3 A for 100 ns turn-on) |
Pinout & Package
PSMN1R3-100ASF uses the CCPAK1212 (SOT8000A) surface-mount copper-clip package: 12 mm × 12 mm × 2.5 mm body, 13 terminals (12 signal + 1 exposed mounting base), 2.0 mm pitch, JEDEC-qualified for open-market compatibility and thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | G | Gate input - Low-impedance control node requiring <2.2 Ω series resistance to damp ringing |
| 2–5, 6 | S | Source return - Six parallel source terminals minimize source inductance and improve current sharing |
| 7–12 | D | Drain connection - Six drain terminals plus mounting base provide low-inductance, high-current path to DC bus |
| mb | D (mounting base) | Thermally and electrically connected to drain - Serves as primary heat extraction path to heatsink or PCB copper |
Key Features
| Feature | Design Value |
|---|---|
| Low Qrr | 74 nC enables reduced voltage overshoot and EMI in high-dI/dt freewheeling paths |
| CCPAK1212 package | JEDEC-qualified copper clip construction delivers 3× lower Rth(j-mb) vs. TO-263 and supports >350 A continuous current |
| Avalanche rating | 100% tested to 1126 mJ ensures reliable operation under unclamped inductive switching stress |
| High-temperature qualification | Rated for 175 °C Tj operation - Suitable for sealed enclosures and high-ambient industrial environments |
| RoHS & halogen-free | Compliant with EU RoHS Directive 2011/65/EU and JEDEC JS709E - Meets environmental requirements for global OEMs |
Applications
| Battery Protection Circuit | BLDC Motor Inverter Half-Bridge |
|---|---|
|
Use Scenario: High-current e-bike or UPS battery pack with overcurrent and short-circuit cutoff. IC Role / Device Role / Timing Role: Primary power switch in bidirectional protection FET configuration, handling up to 355 A fault current. Use Value: Low RDS(on) minimizes voltage drop during normal operation; avalanche rating absorbs energy during sudden short-circuit events. |
Use Scenario: Upper/lower leg switching in 3-phase BLDC inverter driving 1–3 kW motors. IC Role / Device Role / Timing Role: High-side and low-side power switch operating at 20–50 kHz PWM with synchronous rectification. Use Value: Low QG × RDS(on) FOM reduces combined conduction and switching losses; low Qr suppresses shoot-through risk during dead-time. |
| OR-ing Controller for Redundant Power Supplies | Industrial DC-DC Converter Primary Switch |
|
Use Scenario: 48 V telecom or server power system with dual hot-swap PSUs feeding common bus. IC Role / Device Role / Timing Role: Forward conduction path replacing Schottky diode in ideal diode configuration. Use Value: 0.76 V VSD and fast trr reduce forward drop and reverse recovery loss versus discrete diodes; six-source terminals ensure uniform current distribution. |
Use Scenario: Primary-side switch in isolated 1–2 kW LLC or phase-shifted full-bridge converter. IC Role / Device Role / Timing Role: High-duty-cycle, high-current switching element subjected to repetitive 100 V drain stress and ZVS transitions. Use Value: 100 V VDS rating provides margin above 48 V/54 V nominal bus; low Coss (4157 pF typ.) aids soft-switching efficiency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon IPP026N10N5 | 100 V, 2.6 mΩ, TO-220 package, Rth(j-c) = 0.55 K/W | Limited to ~120 A continuous due to higher thermal resistance and smaller package footprint | Choose when legacy through-hole assembly or lower-cost qualification is required; avoid for >200 A designs. |
| Vishay SiR626DP | 100 V, 1.25 mΩ, PowerPAK® 1212-8, Rth(j-x) = 0.22 K/W | 8-terminal package lacks dedicated mounting base; requires enhanced PCB copper for thermal transfer | Prefer where board space is constrained but thermal budget allows higher Rth; verify mounting base thermal path absence. |
Compared with IPP026N10N5 and SiR626DP, PSMN1R3-100ASF offers superior thermal performance via its exposed drain mounting base and lower RDS(on), enabling higher current density in compact industrial inverters-while maintaining JEDEC-standard package compatibility for supply chain flexibility.
Availability
PSMN1R3-100ASF is available at Aetrix Electronics and suitable for battery protection systems, BLDC motor drives, redundant power OR-ing, and industrial DC-DC converters requiring stable component supply across multi-year production cycles.
Supply support for PSMN1R3-100ASF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, with manufacturing sites in Europe, Asia, and the Americas.
The NextPower product line targets high-efficiency, high-power industrial and consumer applications-designed specifically for demanding switching topologies where low RDS(on), rugged avalanche behavior, and thermal robustness are critical.
FAQ
What is the maximum continuous drain current for PSMN1R3-100ASF under real-world PCB conditions?
The datasheet specifies 355 A at Tmb = 25 °C, but practical current is limited by PCB copper area, thermal interface quality, and ambient temperature. With a 25.4 mm² 70 µm copper pad per side and forced airflow, sustained currents of 250–280 A are achievable while maintaining Tj ≤ 150 °C. Derating curves in Figure 2 must be applied for elevated mounting base temperatures.
Does PSMN1R3-100ASF require gate resistors for reliable operation in hard-switched topologies?
Yes. Due to its low gate resistance (RG = 0.54–2.16 Ω) and high QG(tot) (up to 383 nC), a 2.2–4.7 Ω series gate resistor is recommended to control dV/dt, suppress oscillation, and limit peak gate driver current to <4 A. Layout must minimize gate loop inductance using tight source–gate–driver routing.
How does the CCPAK1212 package improve thermal performance over traditional D²PAK?
CCPAK1212 replaces bond wires with direct copper clips, reducing both thermal resistance (Rth(j-mb) = 0.123 K/W vs. ~0.5 K/W for D²PAK) and parasitic inductance. The exposed drain mounting base provides a low-impedance thermal path directly to the heatsink, enabling >900 W power dissipation with <15 K junction-to-base temperature rise-critical for high-current motor drive modules.
Can PSMN1R3-100ASF be used in automotive applications?
No. This device is not AEC-Q101 qualified and lacks automotive-specific reliability testing, transient immunity validation, or extended temperature characterization beyond 175 °C. Nexperia explicitly states non-automotive qualification in its legal disclaimers. For automotive use, select Nexperia's Automotive Qualified NextPower variants (e.g., PSMN2R0-100BSE) with full AEC-Q101 certification.
PSMN1R3-100ASFJ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 12-BESOP (0.370", 9.40mm Width), Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 400A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 7V, 10V
- Rds On (Max) @ Id, Vgs:
- 1.3mOhm @ 25A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 248 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 17737 pF @ 50 V
- FET Feature:
- -
- Power Dissipation (Max):
- 1.071kW (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- CCPAK1212
PSMN1R3-100ASFJ FAQ
1.How can I place an order for PSMN1R3-100ASFJ through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN1R3-100ASFJ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN1R3-100ASFJ reliable?
The price and inventory of PSMN1R3-100ASFJ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN1R3-100ASFJ is usually 5 days.
3.What payment methods are accepted for PSMN1R3-100ASFJ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN1R3-100ASFJ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN1R3-100ASFJ?
PSMN1R3-100ASFJ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN1R3-100ASFJ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN1R3-100ASFJ?
For technical support, including PSMN1R3-100ASFJ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN1R3-100ASFJ requirements.
6.How does Aetrix verify that PSMN1R3-100ASFJ is sourced from the original manufacturer or authorized distributors?
All PSMN1R3-100ASFJ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN1R3-100ASFJ meets industry standards.
7.What is the process for return or replacement of PSMN1R3-100ASFJ?
All PSMN1R3-100ASFJ units undergo pre-shipment inspection (PSI). If there is an issue with PSMN1R3-100ASFJ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN1R3-100ASFJ part is unused and in its original packaging.
Return procedure for PSMN1R3-100ASFJ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PSMN1R3-100ASFJ Tags
-
BSZ180P03NS3EGATMA1
Infineon Technologies
-
SIRA14DP-T1-GE3
Vishay Siliconix
-
AO4419
Alpha & Omega Semiconductor Inc.
-
SISA14BDN-T1-GE3
Vishay Siliconix
-
PSMN9R5-30YLC,115
Nexperia USA Inc.
-
BUK9Y21-40E,115
Nexperia USA Inc.
-
RTQ035N03HZGTR
Rohm Semiconductor
-
FDMS7680
onsemi
-
RQ3E180BNTB
Rohm Semiconductor
-
STL6N2VH5
STMicroelectronics
-
DMPH4029LFGQ-7
Diodes Incorporated
-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
