Nexperia USA Inc. PSMN1R4-30YLDX
- Part No.:
- PSMN1R4-30YLDX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- SC-100, SOT-669
- Datasheet:
-
PSMN1R4-30YLDX.pdf
- Description:
- MOSFET N-CH 30V 100A LFPAK56
- Quantity:
- Payment:

- Shipping:

Inventory:18,356
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Product details
Overview
PSMN1R4-30YLD from Nexperia is an N-channel 30 V, 1.4 mΩ logic-level MOSFET in LFPAK56 (SOT669) package, engineered for high-efficiency synchronous rectification and power delivery in server/telecom DC-DC converters. It delivers RDS(on) = 1.11 mΩ @ 10 V, QG(tot) = 27.6 nC @ 4.5 V, and soft-recovery diode performance (s-factor = 0.99) with <1 µA leakage at 25 °C.
For engineers reviewing the PSMN1R4-30YLD datasheet, PSMN1R4-30YLD pinout, PSMN1R4-30YLD application, or PSMN1R4-30YLD equivalent, key selection criteria include low gate charge for high-frequency switching, ultra-low on-resistance at 4.5 V drive, thermal robustness up to 175 °C junction temperature, and Schottky-like diode softness without elevated leakage.
Technical Context
This MOSFET employs Nexperia's NextPowerS3 architecture with "SchottkyPlus" technology-integrating a soft-recovery intrinsic body diode that achieves s-factor > 0.99 and reverse recovery charge Qr = 34 nC while maintaining IDSS < 1 µA at 25 °C. Its LFPAK56 clip-bonded construction eliminates wire bonds and adhesive, enabling Rth(j-mb) = 0.81 K/W and 166 W power dissipation at Tmb = 25 °C.
The device is optimized for 4.5 V gate drive, with VGS(th) = 1.7 V (typ), ΔVGS(th)/ΔT = −4.6 mV/K, and RDS(on) = 1.44 mΩ @ 4.5 V/25 A/25 °C. Dynamic parameters include Ciss = 3840 pF, Coss = 1785 pF, and tr = 28 ns, supporting clean switching in POL and VRM topologies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum drain-source blocking voltage for 12 V/24 V bus applications |
| RDS(on) @ 4.5 V | 1.44 mΩ (typ) - Enables efficient operation with standard logic-level drivers |
| QG(tot) @ 4.5 V | 27.6 nC - Low gate charge reduces driver loss and enables >1 MHz switching |
| s-factor | 0.99 - Soft reverse recovery minimizes EMI and voltage spikes in synchronous rectifiers |
| Rth(j-mb) | 0.81 K/W - High thermal conductivity supports high-power density mounting on PCB copper pads |
| ID (cont) | 100 A - Continuous current rating limited by package thermal capability at Tmb = 25 °C |
| VGS(th) | 1.7 V (typ) - Ensures reliable turn-on with 3.3 V or 5 V control logic |
Pinout & Package
LFPAK56 (SOT669) is a clip-bonded, solder-die-attached Power-SO8 variant with exposed mounting base (drain-connected) and wave-solderable leads. It eliminates wire bonds and organic adhesives, achieving 175 °C qualification and low parasitic inductance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source (S) | Three parallel source terminals reduce conduction resistance and improve current sharing |
| 4 | Gate (G) | Single gate input with low RG = 1.1 Ω for fast, controlled edge rates |
| Mounting Base (mb) | Drain (D) | Exposed copper pad electrically connected to drain; primary thermal path to PCB |
Key Features
| Feature | Design Value |
|---|---|
| SchottkyPlus body diode | Soft recovery (s = 0.99) with Qr = 34 nC and IDSS < 1 µA @ 25 °C-enables high-efficiency SR without external Schottky |
| Ultra-low QG, QGD, QOSS | QG(tot) = 27.6 nC @ 4.5 V; QGD = 8.5 nC-reduces switching loss and EMI in high-frequency POL converters |
| Optimized 4.5 V drive | RDS(on) = 1.44 mΩ @ 4.5 V/25 A-ensures full enhancement with standard microcontroller GPIO or PWM drivers |
| Clip-bonded LFPAK56 | No wire bonds or glue; qualified to 175 °C-delivers high reliability in thermally stressed telecom/server environments |
| Low-inductance layout | Minimized source inductance via triple-source pins and exposed drain pad-reduces ringing and improves stability in hard-switched topologies |
Applications
| Server DC-DC Conversion | Telecom Secondary-Side SR |
|---|---|
Use Scenario: Point-of-load regulation in high-density server motherboards delivering 12 V → 1.8 V to CPUs/GPUs. IC Role / Device Role / Timing Role: Synchronous rectifier in multiphase buck converters operating at 500 kHz–1 MHz. Use Value: 1.44 mΩ RDS(on) @ 4.5 V and soft diode recovery reduce conduction + switching losses, improving system efficiency by ≥1.2% vs. standard MOSFETs. | Use Scenario: Secondary-side rectification in telecom AC-DC front-end PSUs feeding 48 V intermediate bus. IC Role / Device Role / Timing Role: Low-voltage, high-current switch in active clamp forward or LLC resonant converters. Use Value: QG(tot) = 27.6 nC and s-factor = 0.99 minimize gate drive loss and output voltage overshoot during zero-voltage switching transitions. |
| VRM Power Delivery | Power OR-ing |
Use Scenario: Voltage regulator module supplying core voltage to ASICs and FPGAs in networking equipment. IC Role / Device Role / Timing Role: High-side or low-side switch in multi-phase buck regulators with digital PWM controllers. Use Value: Triple-source pin configuration lowers effective source inductance, improving transient response and reducing output voltage ripple under dynamic load steps. | Use Scenario: Redundant 12 V power path selection in industrial PLC backplanes with hot-swap capability. IC Role / Device Role / Timing Role: Ideal diode replacement in discrete OR-ing circuits using external gate control. Use Value: Ultra-low VSD = 0.79 V (typ) and fast trr = 38.6 ns enable near-lossless reverse-blocking and rapid fault isolation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel logic-level MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSMN2R0-30YLC | RDS(on) = 2.0 mΩ @ 4.5 V; QG(tot) = 22.5 nC; same LFPAK56 package | Higher on-resistance but lower gate charge-better for very high-frequency (>2 MHz) low-current POL stages | Select when prioritizing gate drive efficiency over conduction loss in sub-30 A loads. |
| IPB110N15N3G | 150 V rating; RDS(on) = 1.1 mΩ @ 10 V; TO-263 package; no SchottkyPlus diode | Higher voltage capability but lacks soft-recovery diode-requires external freewheeling diode in SR designs | Choose only for 48 V bus applications where 30 V rating is insufficient; not drop-in for PSMN1R4-30YLD SR roles. |
Compared with PSMN2R0-30YLC, PSMN1R4-30YLD trades 0.6 mΩ lower RDS(on) for 5.1 nC higher QG, favoring high-current efficiency; versus IPB110N15N3G, it offers integrated soft diode and 30 V optimization for compact 12 V systems, eliminating external diode cost and layout area.
Availability
PSMN1R4-30YLD is available at Aetrix Electronics and suitable for server DC-DC conversion, telecom secondary-side synchronous rectification, and VRM power delivery requiring stable component supply across extended production lifecycles.
Supply support for PSMN1R4-30YLD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential semiconductors, delivering high-performance, reliable components for automotive, industrial, and computing markets.
PSMN1R4-30YLD belongs to the NextPowerS3 portfolio-designed specifically for high-efficiency, high-frequency power conversion in datacenter and telecom infrastructure where low RDS(on), soft diode recovery, and thermal robustness are critical.
FAQ
What is the maximum continuous drain current for PSMN1R4-30YLD at 100 °C mounting base temperature?
The maximum continuous drain current is 100 A at Tmb = 100 °C, as specified in the datasheet Figure 2. This rating is package-limited and assumes proper PCB copper area and thermal management per the recommended footprint in Figure 6. Derating applies above 100 °C mounting base temperature.
Does PSMN1R4-30YLD require a gate resistor for stable operation in a 1 MHz buck converter?
A gate resistor is recommended to dampen ringing and control dV/dt, especially given its low gate resistance (RG = 1.1 Ω) and high-speed switching (tr = 28 ns). Typical values range from 2.2 Ω to 10 Ω depending on driver strength and layout parasitics-verified in Nexperia's application note AN11158 for LFPAK56 MOSFETs.
How does the "SchottkyPlus" diode compare to a discrete Schottky in terms of reverse leakage?
The integrated SchottkyPlus diode maintains IDSS < 1 µA at 25 °C and 1.4 µA at 125 °C-significantly lower than typical discrete Schottky diodes (often >100 µA at 125 °C). This enables use in high-temperature telecom environments without thermal runaway risk or efficiency penalty.
Can PSMN1R4-30YLD be used in linear mode (e.g., electronic load or LDO pass element)?
No-it is not characterized or qualified for linear-mode operation. The Safe Operating Area (SOA) curve (Figure 3) shows pulsed current limits only, and the device lacks SOA-rated linear operation data. Its design targets switched-mode applications with defined duty cycles and thermal cycling profiles.
PSMN1R4-30YLDX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SC-100, SOT-669
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 100A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 1.42mOhm @ 25A, 10V
- Vgs(th) (Max) @ Id:
- 2.2V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 54.8 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3840 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 166W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK56, Power-SO8
PSMN1R4-30YLDX FAQ
1.How can I place an order for PSMN1R4-30YLDX through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN1R4-30YLDX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN1R4-30YLDX reliable?
The price and inventory of PSMN1R4-30YLDX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN1R4-30YLDX is usually 5 days.
3.What payment methods are accepted for PSMN1R4-30YLDX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN1R4-30YLDX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN1R4-30YLDX?
PSMN1R4-30YLDX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN1R4-30YLDX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN1R4-30YLDX?
For technical support, including PSMN1R4-30YLDX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN1R4-30YLDX requirements.
6.How does Aetrix verify that PSMN1R4-30YLDX is sourced from the original manufacturer or authorized distributors?
All PSMN1R4-30YLDX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN1R4-30YLDX meets industry standards.
7.What is the process for return or replacement of PSMN1R4-30YLDX?
All PSMN1R4-30YLDX units undergo pre-shipment inspection (PSI). If there is an issue with PSMN1R4-30YLDX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN1R4-30YLDX part is unused and in its original packaging.
Return procedure for PSMN1R4-30YLDX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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