Nexperia USA Inc. PSMN2R3-80SSFJ
- Part No.:
- PSMN2R3-80SSFJ
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- SOT-1235
- Datasheet:
-
PSMN2R3-80SSFJ.pdf
- Description:
- NEXTPOWER 80/100V MOSFETS
- Quantity:
- Payment:

- Shipping:

Inventory:2,000
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Product details
Overview
PSMN2R3-80SSF from Nexperia is an N-channel NextPower MOSFET optimized for high-current, high-efficiency switching in industrial and consumer power systems. It delivers 240 A continuous drain current at Tmb = 25 °C, features a typ. RDS(on) of 1.7 mΩ at VGS = 10 V and Tj = 25 °C, supports 80 V drain-source voltage, and is qualified to 175 °C junction temperature. It serves as a primary-side switch or synchronous rectifier in high-density DC-DC converters.
For engineers reviewing the PSMN2R3-80SSF datasheet, PSMN2R3-80SSF pinout, PSMN2R3-80SSF application, or PSMN2R3-80SSF equivalent, key selection criteria include its LFPAK88 thermal performance (Rth(j-mb) typ. 0.22 K/W), low QG × RDS(on) figure-of-merit, avalanche ruggedness (663 mJ EAS), and 100% tested unclamped avalanche capability.
Technical Context
This MOSFET employs a trench-gate silicon process with optimized charge distribution to achieve low RDS(on) and reduced gate-drain charge (QGD typ. 22 nC). Its LFPAK88 package integrates a large copper mounting base directly connected to the drain, enabling efficient heat extraction from the die to the PCB thermal pad.
The device operates with standard-level gate drive (VGS(th) typ. 3 V, max 4 V at 25 °C) and exhibits stable threshold voltage over temperature (ΔVGS(th)/ΔT = −8.4 mV/K). Its source-drain diode shows low reverse recovery charge (Qr typ. 47 nC) and fast trr (typ. 49 ns), supporting high-frequency synchronous rectification without external Schottky assistance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 80 V - Maximum blocking voltage for 48 V and 60 V bus applications with margin. |
| RDS(on) (typ., 25 °C) | 1.7 mΩ - Enables <1.0 W conduction loss at 240 A, critical for high-current power stages. |
| ID (cont., Tmb = 25 °C) | 240 A - Validated continuous current rating, limited by thermal design, not intrinsic device limit. |
| QG(tot) | 123 nC (typ.) - Low total gate charge enables fast switching with moderate gate driver strength. |
| EAS | 663 mJ - 100% tested unclamped avalanche energy supports robust operation under inductive turn-off stress. |
| Rth(j-mb) | 0.22 K/W (typ.) - Junction-to-mounting-base thermal resistance enables >300 W power dissipation with proper heatsinking. |
| Qr | 47 nC - Low recovered charge reduces switching losses and voltage spikes in synchronous rectifier mode. |
Pinout & Package
PSMN2R3-80SSF uses the LFPAK88 (SOT1235) package: an 8 mm × 8 mm × 1.6 mm surface-mount outline with exposed copper mounting base (drain-connected), optimized for high-current thermal and electrical performance. The package features three parallel source terminals and one gate terminal on the top side, with drain electrically and thermally coupled to the bottom mounting base.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | G | Gate control input - accepts standard 10 V logic-level drive; low QG × RDS(on) minimizes drive loss. |
| 2, 3, 4 | S | Source return path - three parallel terminals reduce source inductance and resistive drop in high-di/dt switching. |
| Mounting Base | D | Drain connection and primary thermal path - soldered directly to PCB copper pour for minimal Rth(j-mb). |
Key Features
| Feature | Design Value |
|---|---|
| Low Qrr | 47 nC - Reduces reverse recovery loss and EMI in synchronous rectification, enabling higher frequency operation. |
| Strong avalanche rating | 663 mJ EAS, 100% tested - Eliminates need for external snubbers in hard-switched bridge legs and motor drives. |
| LFPAK88 thermal architecture | Rth(j-mb) = 0.22 K/W - Delivers >3× better thermal performance than comparable D²PAK packages at same footprint. |
| High-current source configuration | Three parallel S pins - Lowers effective source inductance (<0.5 nH) to suppress parasitic oscillation during fast turn-off. |
| Robust gate oxide | VGS rating ±20 V - Supports reliable operation with gate drive overshoot in noisy industrial environments. |
Applications
| AC-DC Secondary Side | DC-DC Primary Switch |
|---|---|
|
Use Scenario: High-efficiency 1–3 kW server PSU secondary-side synchronous rectification with 12 V or 48 V output. IC Role / Device Role / Timing Role: N-channel MOSFET operating in synchronous rectifier mode, replacing Schottky diodes to reduce conduction loss. Use Value: 1.7 mΩ RDS(on) cuts conduction loss by >60% vs. 40 V Schottky, improving full-load efficiency by up to 1.2%. |
Use Scenario: 600 W telecom DC-DC brick using half-bridge topology with 48 V input. IC Role / Device Role / Timing Role: High-side primary switch in isolated forward or LLC resonant converter. Use Value: 240 A ID rating and 80 V VDS support 48 V bus with 2× safety margin; low QGD ensures clean zero-voltage switching transitions. |
| BLDC Motor Inverter | Battery Protection FET |
|
Use Scenario: 3–5 kW industrial BLDC motor drive with field-oriented control and 60 V nominal battery. IC Role / Device Role / Timing Role: Low-side switch in 3-phase inverter leg, handling peak currents >700 A. Use Value: 1038 A pulsed IDM and 663 mJ EAS withstand motor phase short-circuits and regenerative braking transients without failure. |
Use Scenario: Smart battery pack protection circuit for 48 V e-bike or energy storage systems. IC Role / Device Role / Timing Role: Main discharge/charge FET controlling bidirectional current flow between cells and load/charger. Use Value: Three-source-pin layout minimizes Kelvin sensing error; 175 °C Tj rating ensures reliability under sustained overload conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current, 80 V N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon IPP026N08N | RDS(on) = 2.6 mΩ (typ.), QG = 135 nC, TO-220FP package, Rth(j-c) = 0.9 K/W | Higher thermal resistance limits continuous current to ~120 A without forced cooling; less suitable for compact SMT designs. | Choose when legacy through-hole assembly or lower gate charge sensitivity is required. |
| Vishay SiR626DP | RDS(on) = 2.2 mΩ (typ.), QG = 112 nC, PowerPAK 8 × 8 package, Rth(j-mb) = 0.35 K/W | Lower avalanche rating (EAS = 390 mJ), no 100% avalanche test, and higher Rth reduce robustness in hard-switched motor drives. | Choose when cost sensitivity outweighs avalanche ruggedness requirements in DC-DC applications. |
Compared with IPP026N08N and SiR626DP, PSMN2R3-80SSF offers superior thermal performance (0.22 K/W vs. ≥0.35 K/W), higher validated current (240 A vs. ≤120 A), and guaranteed avalanche ruggedness - making it optimal for space-constrained, high-reliability industrial inverters and server PSUs.
Availability
PSMN2R3-80SSF is available at Aetrix Electronics and suitable for high-power AC-DC converters, BLDC motor inverters, and battery protection circuits requiring stable component supply across multi-year production cycles.
Supply support for PSMN2R3-80SSF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential semiconductors, delivering high-performance, reliable discrete and logic devices for automotive, industrial, and consumer markets.
PSMN2R3-80SSF belongs to the NextPower family - engineered specifically for high-efficiency, high-current power conversion in space-constrained industrial and computing applications where thermal density and avalanche robustness are critical.
FAQ
What is the maximum continuous drain current for PSMN2R3-80SSF?
The datasheet specifies 240 A continuous drain current at Tmb = 25 °C with sufficient PCB copper area. At Tmb = 100 °C, the rating drops to 183 A. Real-world current is constrained by thermal design - the 0.22 K/W Rth(j-mb) requires ≥200 cm² of 70 μm copper on FR4 to sustain 240 A continuously.
Does PSMN2R3-80SSF require a negative gate voltage for safe operation?
No. The device has a VGS rating of ±20 V and is designed for standard-level 0 V/10 V gate drive. Its VGS(th) ranges from 2 V to 4 V, and gate oxide integrity is maintained without negative bias. However, a small negative turn-off voltage (e.g., −2 V) may be used to improve noise immunity in high-dV/dt environments.
How is avalanche ruggedness verified for this MOSFET?
Nexperia performs 100% unclamped inductive switching (UIS) testing per JEDEC JESD24-11 on every production unit. Each device is stressed with IAS = 78 A, Vsup ≤ 80 V, RGS = 50 Ω, and tp = 163 µs at Tj(init) = 25 °C, verifying minimum 663 mJ EAS without degradation.
Can PSMN2R3-80SSF be used in paralleled configurations?
Yes - its positive temperature coefficient for RDS(on) (normalized factor increases with Tj) ensures inherent current sharing. The three-source-pin layout also minimizes asymmetry. For stable paralleling, match gate drive loop inductance and use individual gate resistors (≥5 Ω) to damp oscillation; derate total current by 15% for thermal margin.
PSMN2R3-80SSFJ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-1235
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 80 V
- Current - Continuous Drain (Id) @ 25°C:
- 240A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 7V, 10V
- Rds On (Max) @ Id, Vgs:
- 2.3mOhm @ 25A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 184 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 12320 pF @ 40 V
- FET Feature:
- -
- Power Dissipation (Max):
- 341W (Ta)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK88 (SOT1235)
PSMN2R3-80SSFJ FAQ
1.How can I place an order for PSMN2R3-80SSFJ through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN2R3-80SSFJ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN2R3-80SSFJ reliable?
The price and inventory of PSMN2R3-80SSFJ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN2R3-80SSFJ is usually 5 days.
3.What payment methods are accepted for PSMN2R3-80SSFJ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN2R3-80SSFJ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN2R3-80SSFJ?
PSMN2R3-80SSFJ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN2R3-80SSFJ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN2R3-80SSFJ?
For technical support, including PSMN2R3-80SSFJ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN2R3-80SSFJ requirements.
6.How does Aetrix verify that PSMN2R3-80SSFJ is sourced from the original manufacturer or authorized distributors?
All PSMN2R3-80SSFJ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN2R3-80SSFJ meets industry standards.
7.What is the process for return or replacement of PSMN2R3-80SSFJ?
All PSMN2R3-80SSFJ units undergo pre-shipment inspection (PSI). If there is an issue with PSMN2R3-80SSFJ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN2R3-80SSFJ part is unused and in its original packaging.
Return procedure for PSMN2R3-80SSFJ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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