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Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Nexperia USA Inc. PSMN4R0-25YLC,115

Name: PSMN4R0-25YLC,115
Brand: Nexperia USA Inc.
SKU: PSMN4R0-25YLC,115
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: PSMN4R0-25YLC,115

Manufacturer:: Nexperia USA Inc.

Category:: FETs, MOSFETs

Package:: SC-100, SOT-669

Datasheet:: PSMN4R0-25YLC,115.pdf

Description:: MOSFET N-CH 25V 84A LFPAK56

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Product details

Overview

PSMN4R0-25YLC from Nexperia is a logic-level enhancement-mode N-channel MOSFET in LFPAK (SOT669) package, rated for 25 V V_DS, 4.5 mΩ R_DS(on) at V_GS = 4.5 V and 20 A, 84 A continuous drain current at T_mb = 25 °C, and qualified to 175 °C junction temperature. It serves as a high-efficiency synchronous rectifier or load switch in server power supplies and DC-DC converters.

For engineers reviewing the PSMN4R0-25YLC datasheet, PSMN4R0-25YLC pinout, PSMN4R0-25YLC application, or PSMN4R0-25YLC equivalent, key selection criteria include its 4.5 V gate drive optimization, ultra-low Q_G (10.9 nC) and Q_GD (3.5 nC), 1.4 K/W typical thermal resistance (junction-to-mounting base), and LFPAK package's low parasitic inductance for high-frequency switching.

Technical Context

This MOSFET employs Superjunction technology to achieve low R_DS(on) with fast switching dynamics, enabling high system efficiency across light and heavy loads. Its gate threshold voltage (V_GS(th)) ranges from 1.05 V to 1.95 V at 25 °C, ensuring reliable turn-on with standard logic-level drivers.

The device features an integrated source-drain diode with 0.8–1.1 V forward voltage at 20 A and 24.5 ns reverse recovery time, supporting synchronous rectification without external body diode reliance. Thermal design is anchored to the mounting base (mb), with R_th(j-mb) = 1.4 K/W (typ), making thermal management predictable in PCB-mounted applications.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	25 V - Maximum blocking voltage for 24 V rail systems and intermediate bus converters.
R_DS(on)	4.5 mΩ (typ) at V_GS = 4.5 V, 20 A, 25 °C - Enables <1 W conduction loss at 20 A, critical for high-current load switching.
I_D	84 A continuous at T_mb = 25 °C - Supports high-power server VRMs and OR-ing circuits without forced air cooling.
Q_G(tot)	10.9 nC at V_GS = 4.5 V - Low gate charge reduces driver power and enables >1 MHz operation in resonant topologies.
R_th(j-mb)	1.4 K/W (typ) - Direct thermal path to PCB copper allows efficient heat extraction via thermal pad under mounting base.
V_GS(th)	1.53 V (typ) at 25 °C - Ensures robust turn-on margin with 3.3 V or 5 V logic drivers without gate boosting.
t_r/t_f	17.5 ns / 9.9 ns - Fast edge rates minimize switching losses in hard-switched and ZVS/ZCS converters.

Pinout & Package

PSMN4R0-25YLC uses the LFPAK (SOT669) plastic surface-mount package with exposed mounting base connected to drain. The package provides low-inductance, high-current capability and enhanced thermal performance via direct PCB copper contact.

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 3	Source (S)	Three parallel source terminals reduce source inductance and improve current sharing in high-di/dt applications.
4	Gate (G)	Single gate input optimized for 4.5 V drive; low C_iss (1407 pF) minimizes Miller effect during switching.
Mounting Base (mb)	Drain (D)	Exposed copper pad electrically and thermally connected to drain; must be soldered to large PCB copper area for thermal and electrical integrity.

Key Features

Feature	Design Value
Logic-level gate drive	Guaranteed turn-on at V_GS = 4.5 V, compatible with 3.3 V/5 V microcontrollers and PWM controllers without level-shifting.
Superjunction architecture	Enables 4.5 mΩ R_DS(on) at 25 V while maintaining low Q_OSS (7.32 nC), improving light-load efficiency in buck converters.
Ultra-low Q_GD	3.5 nC at V_GS = 4.5 V - Reduces Miller plateau duration and dv/dt-induced false turn-on risk in high-side configurations.
175 °C qualified reliability	Rated for continuous operation up to T_j = 175 °C, supporting industrial and telecom equipment with extended thermal margins.
Low parasitic inductance	LFPAK layout minimizes source loop inductance (<0.5 nH estimated), critical for minimizing voltage overshoot in synchronous rectifiers.

Applications

Server Power Supply

DC-DC Converter

Use Scenario: Primary-side or secondary-side switching in 48 V–12 V intermediate bus converters within rack-mounted servers.

IC Role / Device Role / Timing Role: Synchronous rectifier replacing Schottky diodes to reduce conduction loss and improve full-load efficiency beyond 95%.

Use Value: 4.5 mΩ R_DS(on) cuts rectifier loss by >60% vs. 40 V Schottky, directly increasing power density and reducing heatsink requirements.

Use Scenario: High-current step-down conversion in telecom base station power modules operating at 300 kHz–1 MHz.

IC Role / Device Role / Timing Role: High-side or low-side switch in synchronous buck topology, driven by dedicated gate driver ICs.

Use Value: 10.9 nC Q_G and 17.5 ns t_r enable clean switching at 1 MHz with <5% dead-time penalty, preserving regulation bandwidth.

Power OR-ing

Load Switching

Use Scenario: Redundant 12 V power inputs in network switches, where two supplies feed a common bus via back-to-back MOSFETs.

IC Role / Device Role / Timing Role: Low-side OR-ing FET controlling current direction and blocking reverse current during supply failure.

Use Value: 84 A I_D rating and 1.4 K/W R_th(j-mb) allow single-device implementation for 100 W+ rails without derating.

Use Scenario: Hot-swap and inrush control for PCIe add-in cards or storage modules requiring controlled 5 V/3.3 V rail activation.

IC Role / Device Role / Timing Role: Single N-channel load switch with external gate resistor for slew-rate control of V_OUT.

Use Value: 1.53 V V_GS(th) ensures full enhancement with 3.3 V GPIO, while 24.5 ns t_rr prevents shoot-through during sequencing.

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel logic-level MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IRLHS6342TRPBF	20 V V_DS, 3.8 mΩ R_DS(on) @ 4.5 V, 12 A I_D, PQFN 3.3 × 3.3 mm package	Lower voltage rating and current capacity; unsuitable for 24 V systems or >20 A loads	Select only for space-constrained 12 V applications where 25 V margin is unnecessary.
DMTH4007LPSQ-13	40 V V_DS, 5.2 mΩ R_DS(on) @ 4.5 V, 60 A I_D, PowerDI 5060 package	Higher voltage rating but higher R_DS(on) and larger footprint; lower thermal efficiency at 25 V	Prefer when 40 V transient tolerance is required, but expect ~15% higher conduction loss at 20 A.

Compared with IRLHS6342TRPBF, PSMN4R0-25YLC delivers 3× higher current handling and 25 V robustness for industrial 24 V rails; versus DMTH4007LPSQ-13, it achieves lower R_DS(on) and superior thermal resistance in a smaller LFPAK footprint, optimizing efficiency and board area in 25 V synchronous rectification.

Availability

PSMN4R0-25YLC is available at Aetrix Electronics and suitable for server power supplies, DC-DC converters, power OR-ing circuits, and hot-swap load switching requiring stable component supply and long-term industrial lifecycle support.

Supply support for PSMN4R0-25YLC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert specializing in high-performance, high-reliability discrete and logic devices, with leadership in MOSFETs, ESD protection, and automotive-qualified components.

PSMN4R0-25YLC belongs to Nexperia's LFPAK logic-level MOSFET product line, engineered for high-efficiency power conversion in industrial, communications, and computing infrastructure where low R_DS(on), fast switching, and thermal robustness are critical.

FAQ

What is the maximum continuous drain current for PSMN4R0-25YLC at 100 °C mounting base temperature?

At T_mb = 100 °C, the continuous drain current is derated to 60 A per the limiting values table. This reflects thermal constraints of the LFPAK package under real-world PCB thermal conditions, not ambient temperature ratings. Derating follows the normalized power dissipation curve in Figure 2 of the datasheet.

Can PSMN4R0-25YLC be used in avalanche mode, and what is its rated energy?

Yes - PSMN4R0-25YLC is specified for non-repetitive drain-source avalanche with E_AS = 17.4 mJ at T_j(init) = 25 °C, I_D = 84 A, V_sup ≤ 25 V, and R_GS = 50 Ω. This rating supports limited unclamped inductive switching events but is not intended for repetitive avalanche operation.

How does the three-source-pin configuration impact PCB layout?

The three parallel source pins (pins 1–3) reduce source loop inductance and distribute high-frequency current paths, lowering voltage spikes during switching. Layout best practice requires symmetric copper pours connecting all three pins to a common ground plane, avoiding daisy-chaining traces that increase impedance imbalance.

Is the mounting base (drain) electrically isolated from the PCB substrate?

No - the mounting base is internally connected to the drain terminal and must be soldered to a PCB copper area designated as the drain net. Electrical isolation is not provided; thermal and electrical connection to the PCB is mandatory for both functionality and reliability. Insulating thermal pads or dielectric layers will impair performance and violate absolute maximum ratings.

PSMN4R0-25YLC,115 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: -

Package/Case:: SC-100, SOT-669

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 25 V

Current - Continuous Drain (Id) @ 25°C:: 84A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 4.5V, 10V

Rds On (Max) @ Id, Vgs:: 4.5mOhm @ 20A, 10V

Vgs(th) (Max) @ Id:: 1.95V @ 1mA

Gate Charge (Qg) (Max) @ Vgs:: 22.8 nC @ 10 V

Vgs (Max):: ±20V

Input Capacitance (Ciss) (Max) @ Vds:: 1407 pF @ 12 V

FET Feature:: -

Power Dissipation (Max):: 61W (Tc)

Operating Temperature:: -55°C ~ 175°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: LFPAK56, Power-SO8

PSMN4R0-25YLC,115 FAQ

1.How can I place an order for PSMN4R0-25YLC,115 through Aetrix?

Please submit a Request for Quotation (RFQ) for PSMN4R0-25YLC,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PSMN4R0-25YLC,115 reliable?

The price and inventory of PSMN4R0-25YLC,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN4R0-25YLC,115 is usually 5 days.

3.What payment methods are accepted for PSMN4R0-25YLC,115?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN4R0-25YLC,115 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PSMN4R0-25YLC,115?

PSMN4R0-25YLC,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PSMN4R0-25YLC,115 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PSMN4R0-25YLC,115?

For technical support, including PSMN4R0-25YLC,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN4R0-25YLC,115 requirements.

6.How does Aetrix verify that PSMN4R0-25YLC,115 is sourced from the original manufacturer or authorized distributors?

All PSMN4R0-25YLC,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN4R0-25YLC,115 meets industry standards.

7.What is the process for return or replacement of PSMN4R0-25YLC,115?

All PSMN4R0-25YLC,115 units undergo pre-shipment inspection (PSI). If there is an issue with PSMN4R0-25YLC,115, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PSMN4R0-25YLC,115 part is unused and in its original packaging.

Return procedure for PSMN4R0-25YLC,115:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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