Nexperia USA Inc. PSMN4R5-40PS,127
- Part No.:
- PSMN4R5-40PS,127
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- TO-220-3
- Datasheet:
-
PSMN4R5-40PS,127.pdf
- Description:
- MOSFET N-CH 40V 100A TO220AB
- Quantity:
- Payment:

- Shipping:

Inventory:10
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PSMN4R5-40PS from Nexperia is a standard-level N-channel MOSFET in TO-220AB (SOT78) package, rated for 40 V drain-source voltage, 4.6 mΩ RDS(on) at VGS = 10 V and Tj = 25 °C, and qualified to 175 °C junction temperature. It delivers 100 A continuous drain current at Tmb = 25 °C and supports high-efficiency power switching in industrial DC-DC converters and motor control stages.
For engineers reviewing the PSMN4R5-40PS datasheet, PSMN4R5-40PS pinout, PSMN4R5-40PS application, or PSMN4R5-40PS equivalent, key selection criteria include its low conduction loss (3.9–4.6 mΩ), gate-threshold range (2–4 V at 25 °C), avalanche energy rating (152 mJ), and thermal resistance (0.65–1 K/W from junction to mounting base).
Technical Context
This MOSFET employs a planar silicon process optimized for standard-level gate drive compatibility (VGS = 10 V), with a gate threshold voltage of 2–4 V at 25 °C and stable operation up to 175 °C. Its low RDS(on) and 8.8 nC QGD support fast switching with reduced Miller-induced turn-off delay.
The device integrates an intrinsic body diode with 0.75–1.2 V forward voltage at 25 A and 40 ns reverse recovery time, enabling synchronous rectification and freewheeling in hard-switched topologies. Thermal design relies on direct mounting to heatsinks via the drain-connected metal base (Rth(j-mb) = 0.65–1 K/W).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 40 V - Maximum blocking voltage before avalanche; defines use in ≤40 V bus systems (e.g., 12 V/24 V/36 V industrial rails). |
| RDS(on) | 4.6 mΩ max at VGS = 10 V, ID = 25 A, Tj = 25 °C - Enables <1 W conduction loss at 100 A, critical for high-current load switching. |
| ID (cont) | 100 A at Tmb = 25 °C - Requires heatsink mounting; derates to 96 A at Tmb = 100 °C per Figure 1. |
| QGD | 8.8 nC - Low gate-drain charge minimizes Miller plateau duration, improving switching speed and reducing Esw in hard-switched converters. |
| EAS | 152 mJ (unclamped) - Supports single-pulse inductive energy handling without external snubbers in motor drive or relay driving. |
| Rth(j-mb) | 0.65–1 K/W - Direct thermal path to heatsink enables compact thermal design; 100 A operation requires ≤1.5 K/W total system thermal resistance. |
| VGS(th) | 2–4 V at Tj = 25 °C - Compatible with standard logic-level drivers; retains >1 V threshold up to 175 °C for robust turn-on margin. |
Pinout & Package
PSMN4R5-40PS uses the TO-220AB (SOT78) plastic single-ended package with heatsink mounting and drain-connected metal base. The mounting base serves as both mechanical interface and electrical connection to the drain terminal.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Control electrode; requires 10 V drive for full enhancement; internal RG = 0.97 Ω limits dV/dt sensitivity. |
| 2 (D) | Drain | Main high-side current path; electrically tied to mounting base-must be isolated from heatsink unless system ground reference permits. |
| 3 (S) | Source | Return path for load current; referenced to gate drive common; forms source-drain diode anode (VSD = 0.75–1.2 V). |
Key Features
| Feature | Design Value |
|---|---|
| High-temperature qualification | Rated for continuous operation up to 175 °C junction temperature-enables use in sealed enclosures or high-ambient industrial environments. |
| Low RDS(on) × QG figure-of-merit | 4.6 mΩ × 42.3 nC = 195 mΩ·nC-balances conduction and switching losses for 100–500 kHz DC-DC applications. |
| Robust avalanche capability | 152 mJ non-repetitive EAS allows safe operation under inductive turn-off transients without external clamping. |
| Standard-level gate drive | Operates fully enhanced with 10 V gate drive-compatible with legacy microcontroller GPIOs and discrete driver ICs without level-shifting. |
Applications
| DC-DC Converters | Motor Control |
|---|---|
|
Use Scenario: High-current buck converter in server power supply delivering 50–100 A at 12 V output. IC Role / Device Role / Timing Role: Primary synchronous rectifier switch operating at 200–300 kHz with forced-air cooling. Use Value: 4.6 mΩ RDS(on) reduces conduction loss to <0.5 W at 100 A, improving efficiency by ≥0.8% versus 6 mΩ alternatives. |
Use Scenario: Half-bridge leg in 24 V brushed DC motor driver for industrial automation. IC Role / Device Role / Timing Role: Low-side switch controlling motor direction and PWM speed regulation at ≤20 kHz. Use Value: 152 mJ avalanche rating absorbs flyback energy during PWM dead-time, eliminating need for external TVS diodes. |
| Load Switching | Server Power Supplies |
|
Use Scenario: Hot-swap OR-ing FET in redundant 48 V input distribution for telecom equipment. IC Role / Device Role / Timing Role: Bidirectional load switch managing inrush and fault isolation with external gate control. Use Value: 100 A continuous rating and 545 A pulsed current support handle 2× inrush peaks while maintaining <10 mΩ effective on-resistance. |
Use Scenario: Main 12 V VRM output stage in enterprise-grade server motherboard. IC Role / Device Role / Timing Role: High-side power switch in multiphase buck topology with digital PWM controller. Use Value: 0.65 K/W Rth(j-mb) enables direct heatsink mounting-reducing thermal interface layers and improving long-term reliability at 175 °C Tj. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF1404PBF | RDS(on) = 4.0 mΩ @ 10 V but higher QG = 131 nC; TO-220 package with isolated tab. | Higher switching loss at >100 kHz; better suited for lower-frequency (<50 kHz) high-current linear loads. | Select when lowest conduction loss dominates and switching frequency is ≤50 kHz. |
| STP40NF10L | Logic-level (VGS(th) = 1–2.5 V); RDS(on) = 22 mΩ @ 4.5 V; higher on-resistance at 10 V vs. PSMN4R5-40PS. | Enables 5 V gate drive but sacrifices conduction efficiency-used where microcontroller GPIO drives directly without buffer. | Select only when gate drive voltage is constrained to ≤5 V and current <30 A. |
Compared with IRF1404PBF and STP40NF10L, PSMN4R5-40PS offers optimal balance of low RDS(on), moderate QG, and high-temperature ruggedness-making it preferred for 100–300 kHz industrial DC-DC and motor control where thermal management and reliability are prioritized over ultra-low gate charge.
Availability
PSMN4R5-40PS is available at Aetrix Electronics and suitable for DC-DC converters, motor control systems, and server power supplies requiring stable component supply across extended production lifecycles.
Supply support for PSMN4R5-40PS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified MOSFETs and ESD protection.
This device belongs to Nexperia's standard-level power MOSFET portfolio, engineered for cost-sensitive industrial and communications power systems demanding robust thermal performance and proven field reliability.
FAQ
Is PSMN4R5-40PS suitable for surface-mount PCB assembly?
No. PSMN4R5-40PS uses the through-hole TO-220AB (SOT78) package with a metal mounting base designed for mechanical attachment to external heatsinks. It requires hole-mounting and cannot be reflow soldered or used in SMT processes. Thermal performance depends on proper torque and thermal interface material applied to the mounting base.
What is the maximum allowable gate-source voltage for reliable operation?
The absolute maximum VGS is ±20 V per the datasheet limiting values table. For reliable long-term operation, gate drive should be limited to −10 V to +15 V, with recommended steady-state bias of 10 V for full enhancement. Exceeding ±15 V risks oxide degradation, especially at elevated temperatures.
Does the body diode support continuous reverse recovery in hard-switched circuits?
Yes-the integrated source-drain diode has trr = 40 ns and Qr = 33 nC at 50 A, enabling use in freewheeling and synchronous rectification. However, its softness factor is not specified, so snubber networks may be needed in high-dI/dt (>100 A/µs) applications to limit voltage overshoot.
How does RDS(on) change with junction temperature?
RDS(on) increases with temperature: 3.9 mΩ at 25 °C, 4.6 mΩ at 25 °C (max), and up to 6.7 mΩ at Tj = 100 °C. Figure 13 shows normalized RDS(on) rising ~1.7× from 25 °C to 175 °C, requiring thermal design to maintain Tj < 125 °C for minimal conduction loss drift.
PSMN4R5-40PS,127 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- TO-220-3
- Packaging:
- Tube
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 40 V
- Current - Continuous Drain (Id) @ 25°C:
- 100A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 4.6mOhm @ 25A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 42.3 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2683 pF @ 12 V
- FET Feature:
- -
- Power Dissipation (Max):
- 148W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- TO-220AB
PSMN4R5-40PS,127 FAQ
1.How can I place an order for PSMN4R5-40PS,127 through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN4R5-40PS,127 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN4R5-40PS,127 reliable?
The price and inventory of PSMN4R5-40PS,127 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN4R5-40PS,127 is usually 5 days.
3.What payment methods are accepted for PSMN4R5-40PS,127?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN4R5-40PS,127 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN4R5-40PS,127?
PSMN4R5-40PS,127 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN4R5-40PS,127 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN4R5-40PS,127?
For technical support, including PSMN4R5-40PS,127 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN4R5-40PS,127 requirements.
6.How does Aetrix verify that PSMN4R5-40PS,127 is sourced from the original manufacturer or authorized distributors?
All PSMN4R5-40PS,127 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN4R5-40PS,127 meets industry standards.
7.What is the process for return or replacement of PSMN4R5-40PS,127?
All PSMN4R5-40PS,127 units undergo pre-shipment inspection (PSI). If there is an issue with PSMN4R5-40PS,127, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN4R5-40PS,127 part is unused and in its original packaging.
Return procedure for PSMN4R5-40PS,127:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PSMN4R5-40PS,127 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

