Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Nexperia USA Inc. PSMN5R0-80PS,127

Name: PSMN5R0-80PS,127
Brand: Nexperia USA Inc.
SKU: PSMN5R0-80PS,127
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: PSMN5R0-80PS,127

Manufacturer:: Nexperia USA Inc.

Category:: FETs, MOSFETs

Package:: TO-220-3

Datasheet:: PSMN5R0-80PS,127.pdf

Description:: MOSFET N-CH 80V 100A TO220AB

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:8,223

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

PSMN5R0-80PS from Nexperia is a standard-level N-channel MOSFET in TO-220AB (SOT78) package, rated for 80 V V_DS, 4.7 mΩ R_DS(on) at V_GS = 10 V and T_j = 25 °C, and qualified to 175 °C junction temperature. It delivers 100 A continuous drain current at T_mb = 25 °C and supports high-efficiency power switching in industrial and server applications.

For engineers reviewing the PSMN5R0-80PS datasheet, PSMN5R0-80PS pinout, PSMN5R0-80PS application, or PSMN5R0-80PS equivalent, key selection criteria include its low conduction loss, standard gate drive compatibility (V_GS(th) = 2–4 V), thermal resistance of 0.3 K/W (typ), avalanche energy rating of 396 mJ, and TO-220AB mounting base configuration.

Technical Context

This MOSFET employs planar silicon technology with optimized channel geometry to achieve low R_DS(on) while maintaining robust safe operating area (SOA) up to 100 A DC and 598 A pulsed. Its gate charge profile (Q_G(tot) = 101 nC typ, Q_GD = 21 nC) enables fast switching with moderate gate drive strength.

The device integrates an intrinsic body diode with V_SD = 0.8–1.2 V at I_S = 25 A and t_rr = 56 ns, supporting synchronous rectification and freewheeling in hard-switched topologies. Thermal design is anchored to the mounting base (R_th(j-mb) = 0.3 K/W typ), requiring heatsink attachment per TO-220AB mechanical outline.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	80 V - Maximum blocking voltage before avalanche; defines use in ≤48 V bus systems with margin.
R_DS(on)	4.7 mΩ (typ) at V_GS = 10 V, I_D = 15 A, T_j = 25 °C - Directly determines conduction loss (P_cond ≈ I² × 4.7 mΩ) in load paths.
I_D (cont)	100 A at T_mb = 25 °C - Continuous current capability under ideal heatsinking; derates to ~50 A at T_mb = 100 °C.
E_AS	396 mJ (unclamped) - Energy-handling capacity during inductive turn-off; enables robustness in motor control and SMPS flyback stages.
Q_GD	21 nC - Gate-drain charge governing Miller plateau duration; impacts switching speed and gate driver sizing.
R_th(j-mb)	0.3 K/W (typ) - Junction-to-mounting-base thermal resistance; sets minimum heatsink requirement for thermal management.
V_GS(th)	2–4 V (typ) at T_j = 25 °C - Threshold voltage range enabling reliable turn-on with standard 5 V or 10 V logic-level gate drivers.

Pinout & Package

PSMN5R0-80PS uses the TO-220AB (SOT78) plastic single-ended package with heatsink-mounted configuration and 3 leads. The mounting base (mb) is electrically connected to the drain terminal.

Pin/Terminal	Circuit Role	Design Meaning
1 (G)	Gate	Control electrode; requires ≥10 V for full enhancement; internal R_G = 0.95 Ω limits high-frequency ringing.
2 (D) / mb	Drain & Mounting Base	Main high-side current path; mounting base must be thermally coupled to heatsink and electrically isolated if floating topology is used.
3 (S)	Source	Reference node for gate drive; connects to power ground or low-side switch source; carries full load current and body diode return path.

Key Features

Feature	Design Value
Standard-level gate drive compatibility	Operates fully enhanced with 10 V gate drive; V_GS(th) ≤ 4.6 V ensures turn-on with common microcontroller or driver IC outputs.
High-current SOA with pulse capability	Supports 598 A peak drain current (10 µs pulses); enables handling of motor startup surges and transient overloads without failure.
Low R_DS(on) with temperature stability	R_DS(on) = 7 mΩ max at T_j = 100 °C - maintains efficiency across industrial temperature range without excessive derating.
Integrated avalanche-rated body diode	Body diode t_rr = 56 ns and Q_r = 116 nC support snubberless operation in buck and flyback converters.

Applications

DC-to-DC Converters

Server Power Supplies

Use Scenario: Primary-side switch in 48 V input, 12 V output isolated forward or half-bridge converter.

IC Role / Device Role / Timing Role: High-side power switch controlling energy transfer into transformer primary; operates at 100–500 kHz with hard switching.

Use Value: Low R_DS(on) reduces conduction loss in high-current primary leg; 80 V rating provides margin above 48 V bus with transients.

Use Scenario: OR-ing FET or hot-swap controller in redundant 12 V server backplane distribution.

IC Role / Device Role / Timing Role: Bidirectional load switch managing power path redundancy and fault isolation; controlled via external gate driver.

Use Value: 100 A continuous rating supports high-density server board currents; 175 °C qualification ensures reliability under sustained thermal stress.

Motor Control

Load Switching

Use Scenario: Half-bridge high-side switch in 24–48 V brushed DC motor driver for industrial actuators.

IC Role / Device Role / Timing Role: PWM-controlled power switch delivering variable voltage/current to motor winding; subject to inductive kickback.

Use Value: 396 mJ unclamped avalanche energy absorbs inductive energy during forced commutation without external snubber.

Use Scenario: High-current system power enable switch for FPGA or ASIC power rails in telecom line cards.

IC Role / Device Role / Timing Role: Low-impedance ON/OFF control element placed between bulk capacitor and downstream regulator; driven by microcontroller GPIO.

Use Value: 4.7 mΩ R_DS(on) limits voltage drop to <150 mV at 30 A, minimizing rail sag and self-heating during steady-state operation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel power MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IRF540NPBF	R_DS(on) = 44 mΩ (typ) at V_GS = 10 V - 9× higher conduction loss than PSMN5R0-80PS.	Lower current density; suitable only for ≤20 A loads where thermal budget permits higher loss.	Select when legacy footprint compatibility with IRF540 is required and power density is not critical.
STP80NF55-08	V_DS = 55 V - 31% lower blocking voltage; R_DS(on) = 8 mΩ (typ) - 70% higher on-resistance.	Not suitable for 48 V systems with >10 V transients; limited to ≤36 V nominal bus applications.	Choose only if existing STP80NF55-08 PCB layout and thermal design constrain replacement options.

Compared with IRF540NPBF and STP80NF55-08, PSMN5R0-80PS offers superior power density (4.7 mΩ/80 V), tighter thermal coupling (0.3 K/W), and higher avalanche ruggedness-making it optimal for space-constrained, high-reliability industrial and server power stages where conduction and switching losses directly impact system efficiency and cooling requirements.

Availability

PSMN5R0-80PS is available at Aetrix Electronics and suitable for DC-to-DC converters, server power supplies, and motor control applications requiring stable component supply, long-term industrial lifecycle support, and traceable sourcing from authorized channels.

Supply support for PSMN5R0-80PS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified MOSFETs, ESD protection, and logic families.

This device belongs to Nexperia's standard-level power MOSFET product line, engineered for cost-sensitive yet thermally demanding industrial and computing power applications where gate drive simplicity and ruggedness outweigh ultra-low gate charge requirements.

FAQ

Is PSMN5R0-80PS suitable for 48 V battery-powered motor drives?

Yes. With 80 V V_DS rating and 396 mJ avalanche energy, it safely handles 48 V nominal systems including regenerative braking spikes and inductive kickback. Its 100 A continuous rating at T_mb = 25 °C supports typical 500 W–1 kW motor drives when properly heatsinked.

What is the maximum gate-source voltage that can be applied continuously?

The absolute maximum V_GS is ±20 V per datasheet limiting values. For reliable long-term operation, gate drive should be clamped to ≤15 V, as prolonged exposure to 20 V accelerates gate oxide degradation and increases leakage.

Does the mounting base require electrical isolation from the heatsink?

Yes. The mounting base is internally connected to the drain (Pin 2). If the heatsink is grounded or at a different potential, dielectric isolation (e.g., mica washer + thermal grease) is mandatory to prevent short circuits and ensure safe operation.

Can PSMN5R0-80PS replace a logic-level MOSFET in a 3.3 V microcontroller-driven circuit?

No. Its V_GS(th) range (2–4 V) and full enhancement at V_GS = 10 V make it incompatible with 3.3 V gate drive. A logic-level MOSFET (e.g., with V_GS(th) ≤ 2 V and R_DS(on) specified at 4.5 V) is required for direct 3.3 V MCU interface.

PSMN5R0-80PS,127 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: -

Package/Case:: TO-220-3

Packaging:: Tube

Product Status:: Obsolete

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 80 V

Current - Continuous Drain (Id) @ 25°C:: 100A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 10V

Rds On (Max) @ Id, Vgs:: 4.7mOhm @ 15A, 10V

Vgs(th) (Max) @ Id:: 4V @ 1mA

Gate Charge (Qg) (Max) @ Vgs:: 101 nC @ 10 V

Vgs (Max):: ±20V

Input Capacitance (Ciss) (Max) @ Vds:: 6793 pF @ 12 V

FET Feature:: -

Power Dissipation (Max):: 270W (Tc)

Operating Temperature:: -55°C ~ 175°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Through Hole

Supplier Device Package:: TO-220AB

PSMN5R0-80PS,127 FAQ

1.How can I place an order for PSMN5R0-80PS,127 through Aetrix?

Please submit a Request for Quotation (RFQ) for PSMN5R0-80PS,127 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PSMN5R0-80PS,127 reliable?

The price and inventory of PSMN5R0-80PS,127 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN5R0-80PS,127 is usually 5 days.

3.What payment methods are accepted for PSMN5R0-80PS,127?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN5R0-80PS,127 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PSMN5R0-80PS,127?

PSMN5R0-80PS,127 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PSMN5R0-80PS,127 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PSMN5R0-80PS,127?

For technical support, including PSMN5R0-80PS,127 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN5R0-80PS,127 requirements.

6.How does Aetrix verify that PSMN5R0-80PS,127 is sourced from the original manufacturer or authorized distributors?

All PSMN5R0-80PS,127 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN5R0-80PS,127 meets industry standards.

7.What is the process for return or replacement of PSMN5R0-80PS,127?

All PSMN5R0-80PS,127 units undergo pre-shipment inspection (PSI). If there is an issue with PSMN5R0-80PS,127, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PSMN5R0-80PS,127 part is unused and in its original packaging.

Return procedure for PSMN5R0-80PS,127:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…