Nexperia USA Inc. PSMN6R0-30YL,115

Overview

PSMN6R0-30YL from Nexperia is a logic-level N-channel enhancement-mode MOSFET using TrenchMOS technology in LFPAK (SOT669) package, rated for 30 V drain-source voltage, 4.26 mΩ typical R_DS(on) at V_GS = 10 V and T_j = 25 °C, 79 A continuous drain current at T_mb = 25 °C, and optimized for industrial DC-DC converters and Class-D amplifiers.

For engineers reviewing the PSMN6R0-30YL datasheet, PSMN6R0-30YL pinout, PSMN6R0-30YL application, or PSMN6R0-30YL equivalent, this device supports logic-level gate drive (V_GS(th) = 1.3–2.15 V), delivers low conduction loss with 6 mΩ max R_DS(on), features robust avalanche energy rating (26 mJ), and integrates a source-drain diode with 0.88–1.2 V forward voltage at 25 A.

Technical Context

This MOSFET employs TrenchMOS architecture to achieve low gate charge (Q_G(tot) = 11 nC at V_GS = 4.5 V) and fast switching (t_r = 43 ns, t_f = 11 ns), enabling high-efficiency operation in hard-switched topologies. Its thermal resistance from junction to mounting base is 1.4–2.25 K/W, supporting high-power density designs when mounted on thermally enhanced PCBs.

The device exhibits stable threshold voltage across temperature (V_GS(th) = 0.65 V min at T_j = 150 °C) and low input capacitance (C_iss = 1425 pF), allowing reliable control with standard logic drivers. Its source-drain diode has trr = 32 ns and Q_r = 25 nC, suitable for synchronous rectification and freewheeling in buck and half-bridge configurations.

Key Specifications

Pinout & Package

Package: LFPAK (SOT669), plastic single-ended surface-mounted package with exposed mounting base connected to drain; optimized for high-current, low-inductance PCB layouts and thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel logic-level MOSFET applications.

Compared with IRLML6344TRPBF and DMN3025LFG-7, PSMN6R0-30YL uniquely balances 6 mΩ-class R_DS(on), 11 nC gate charge, and LFPAK's superior thermal resistance (1.4 K/W), making it optimal for 20–80 A industrial switching where logic-level drive and board-level thermal management are jointly critical.

Availability

PSMN6R0-30YL is available at Aetrix Electronics and suitable for industrial motor control, Class-D audio amplifiers, and server DC-DC converters requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for PSMN6R0-30YL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified and industrial-grade MOSFETs, ESD protection, and logic ICs.

This part belongs to Nexperia's TrenchMOS logic-level power MOSFET product line, engineered specifically for high-efficiency, thermally constrained industrial and communications power conversion where gate drive simplicity and ruggedness are mandatory.

FAQ

What is the maximum continuous drain current for PSMN6R0-30YL at 100 °C mounting base temperature?

At T_mb = 100 °C, the continuous drain current is 56 A, as specified in Table 4 (Limiting Values) under "ID drain current" with V_GS = 10 V. This derating reflects thermal constraints of the LFPAK package and must be applied in thermal design calculations using R_th(j-mb) = 1.4–2.25 K/W.

Does PSMN6R0-30YL have an integrated body diode, and what are its key parameters?

Yes - it includes a source-drain diode with V_SD = 0.88–1.2 V at I_S = 25 A and T_j = 25 °C, reverse recovery time t_rr = 32 ns, and recovered charge Q_r = 25 nC. These values enable use as a freewheeling diode in buck converters and half-bridges without external Schottky replacement.

Can PSMN6R0-30YL be driven directly by a 3.3 V microcontroller GPIO without a level shifter?

Yes - its gate threshold voltage V_GS(th) ranges from 1.3 V to 2.15 V at 25 °C, and it achieves full enhancement with V_GS ≥ 4.5 V. At 3.3 V, R_DS(on) rises to 6.18–7.87 mΩ (Table 6), still enabling functional operation in medium-current applications (<30 A) with acceptable conduction loss.

What is the significance of the mounting base (mb) terminal being connected to drain in the LFPAK package?

The mounting base is electrically tied to the drain and serves as the primary thermal and current path. This design reduces thermal resistance by >50% versus standard SO-8, enables direct heatsink attachment or large PCB copper pours, and minimizes parasitic inductance in high-di/dt switching paths - critical for EMI control and efficiency in Class-D and motor drive applications.