Nexperia USA Inc. PSMN6R1-40HLX
- Part No.:
- PSMN6R1-40HLX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FET, MOSFET Arrays
- Package:
- SOT-1205, 8-LFPAK56
- Datasheet:
-
PSMN6R1-40HLX.pdf
- Description:
- MOSFET 2N-CH 40V 40A LFPAK56D
- Quantity:
- Payment:

- Shipping:

Inventory:836
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Product details
Overview
PSMN6R1-40HL from Nexperia is a dual N-channel logic-level MOSFET in LFPAK56D (SOT1205) package, rated for 40 V VDS, 7.2 mΩ RDS(on) at VGS = 5 V and Tj = 25 °C, qualified to 175 °C junction temperature, and designed for high-efficiency synchronous rectification and BLDC motor control.
For engineers reviewing the PSMN6R1-40HL datasheet, PSMN6R1-40HL pinout, PSMN6R1-40HL application, or PSMN6R1-40HL equivalent, this page delivers verified electrical specs, dual-FET pin mapping, thermal resistance (Rth(j-mb) = 2.36 K/W), avalanche energy rating (125 mJ), and real-world use context for server power and motor drive designs.
Technical Context
This dual MOSFET integrates two identical N-channel TrenchMOS devices in a single LFPAK56D copper-clip package, enabling independent gate control (G1/G2) and shared drain-source routing optimized for half-bridge or dual-phase topologies. Each FET supports 40 A continuous drain current at Tmb = 25 °C and exhibits matched RDS(on) drift up to 175 °C.
Its logic-level threshold (VGS(th) = 1.4–2.1 V typ at 25 °C) ensures full enhancement with 5 V microcontroller outputs, while repetitive avalanche rating and 125 mJ non-repetitive EAS support robust operation under switching transients in DC-DC converters and motor drives.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 40 V - Maximum blocking voltage across each FET; defines upper limit for bus voltage in 12 V/24 V/36 V systems. |
| RDS(on) @ VGS = 5 V, Tj = 25 °C | 7.2 mΩ - Low conduction loss per FET at logic-level drive; enables <1.5 W conduction loss at 40 A. |
| ID continuous @ Tmb = 25 °C | 40 A - Package-limited current per FET; requires proper PCB copper area and thermal management. |
| EAS (non-repetitive) | 125 mJ - Avalanche energy handling capability per FET; supports fault tolerance during inductive turn-off events. |
| Rth(j-mb) | 2.36 K/W - Junction-to-mounting-base thermal resistance; enables direct heatsinking via exposed copper pad. |
| QG(tot) | 22.2 nC - Total gate charge per FET; determines driver strength requirement for <50 ns switching transitions. |
| Ciss | 2250–3000 pF - Input capacitance per FET; impacts gate drive loop stability and Miller effect in high-frequency operation. |
Pinout & Package
PSMN6R1-40HL uses the LFPAK56D (SOT1205) dual-power SO8 package: 8-lead surface-mount with exposed copper mounting base, copper-clip die attach, and dual-drain/dual-source layout optimized for low-inductance, high-current PCB routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | S1 | Source terminal of FET1 - referenced to local ground or low-side return path in half-bridge configuration. |
| 2 | G1 | Gate terminal of FET1 - accepts 5 V logic-level drive; requires <22.2 nC charge for full enhancement. |
| 3 | S2 | Source terminal of FET2 - electrically isolated from S1; enables independent source referencing. |
| 4 | G2 | Gate terminal of FET2 - fully independent control input; supports asymmetrical or interleaved gate timing. |
| 5, 6 | D2 | Drain terminal of FET2 - internally paralleled pins (pins 5 & 6) reduce bond-wire inductance and current density. |
| 7, 8 | D1 | Drain terminal of FET1 - internally paralleled pins (pins 7 & 8) provide low-impedance high-current path to bus node. |
Key Features
| Feature | Design Value |
|---|---|
| Dual N-channel topology | Two matched, independently gated MOSFETs in one package - eliminates layout mismatch and reduces board area vs. discrete dual-FET solutions. |
| LFPAK56D copper-clip construction | 2.36 K/W Rth(j-mb) and 64 W Ptot - enables >3× higher power density than standard SO-8 packages at same footprint. |
| Repetitive avalanche rated | Rated for repeated inductive switching stress without degradation - critical for BLDC motor phase-leg reliability. |
| 175 °C junction qualification | Guaranteed operation up to Tj = 175 °C - supports high-ambient environments in server PSUs and industrial motor drives. |
| Logic-level VGS(th) | 1.4–2.1 V typical threshold - ensures full enhancement with 3.3 V or 5 V MCU GPIOs without level-shifting circuitry. |
Applications
| Brushless DC Motor Control | High-Efficiency Server PSU |
|---|---|
|
Use Scenario: Three-phase inverter stage driving 48 V BLDC fans or pumps in data center cooling systems. IC Role / Device Role / Timing Role: Low-side and high-side switch in each half-bridge leg; dual-FET configuration allows compact, thermally balanced phase-leg layout. Use Value: 7.2 mΩ RDS(on) minimizes I²R losses at 30–40 A peak phase current, improving system efficiency by ≥0.8% over comparable 10 mΩ alternatives. |
Use Scenario: Synchronous rectification in 48 V–12 V intermediate bus converter for AI accelerator racks. IC Role / Device Role / Timing Role: Dual-FET used as independent SR switches per output phase; leverages matched RDS(on) and fast QGD = 6.8 nC for ZVS-compatible operation. Use Value: 125 mJ EAS withstands flyback spikes during transient load steps, eliminating need for external snubbers in 800 kHz designs. |
| DC-DC Buck Converter | High-Performance Synchronous Rectifier |
|
Use Scenario: 12 V input, 1.8 V/100 A output VRM for CPU/GPU power delivery in edge servers. IC Role / Device Role / Timing Role: Used as low-side switch only; G1/G2 tied together to double current capacity while maintaining single-gate drive simplicity. Use Value: Parallel drain pins (5+6, 7+8) reduce effective package inductance to <0.5 nH - critical for minimizing voltage overshoot at 1 MHz+ switching. |
Use Scenario: Secondary-side synchronous rectification in 3.3 V/60 A telecom rectifier module. IC Role / Device Role / Timing Role: One FET as main SR, second as redundant or paralleled path; both share same gate drive signal and thermal base. Use Value: Copper-clip construction achieves 2.36 K/W Rth(j-mb), allowing 64 W dissipation with <25 K rise above 85 °C heatsink - enabling fanless operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon BSC028N06NS | Single 60 V, 2.8 mΩ MOSFET in SuperSO8; no dual-FET integration. | Requires two separate packages for dual-switch function; higher layout area and thermal coupling complexity. | Choose when higher voltage margin (60 V) is needed and dual-FET integration is not required. |
| Vishay SiZF300DT | Dual 30 V, 3.0 mΩ LFPAK56 package; lower VDS rating and tighter RDS(on) spec. | Not suitable for 40 V bus systems; limited to ≤30 V applications like USB PD or PoE++. | Choose only for 24 V or lower systems where sub-3 mΩ conduction loss justifies voltage derating. |
Compared with PSMN6R1-40HL, BSC028N06NS offers higher voltage headroom but lacks integrated dual topology and thermal coupling benefits, while SiZF300DT delivers lower RDS(on) at the cost of 25% lower VDS rating - making PSMN6R1-40HL the optimal balance of 40 V capability, dual-FET integration, and 175 °C reliability for server and motor control.
Availability
PSMN6R1-40HL is available at Aetrix Electronics and suitable for brushless DC motor control, high-efficiency server power supplies, and high-performance synchronous rectification requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for PSMN6R1-40HL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in MOSFETs, diodes, and ESD protection components.
PSMN6R1-40HL belongs to Nexperia's TrenchMOS logic-level dual-FET product line, engineered specifically for space-constrained, thermally demanding applications in server power, industrial motor drives, and DC-DC conversion where dual-switch integration and 175 °C operation are essential.
FAQ
Is PSMN6R1-40HL pin-compatible with standard SO-8 or Power-SO8 packages?
No. PSMN6R1-40HL uses the LFPAK56D (SOT1205) package, which has an 8-pin dual-drain/dual-source layout and an exposed copper mounting base. Its footprint differs significantly from SO-8: pin pitch is 1.27 mm, but drain pins 5/6 and 7/8 are internally paralleled, and the thermal pad requires specific solder stencil design per Figure 18 in the datasheet.
What is the maximum continuous drain current per FET at 100 °C mounting base temperature?
Per Figure 2 in the datasheet, the continuous drain current remains 40 A at Tmb = 100 °C when VGS ≥ 5 V. This is explicitly stated in Table 5 (Limiting Values) and confirmed in the "Quick reference data" section - current is package-limited, not silicon-limited, and does not derate until Tmb exceeds 100 °C.
Can the two FETs be operated with different gate drive signals?
Yes. Pins G1 and G2 are fully isolated gate terminals, and S1/S2 are independent source terminals. The device is designed for independent control - e.g., asymmetric PWM in motor phase legs or staggered turn-on in paralleled configurations - with no internal connection between the two FET structures.
Does PSMN6R1-40HL include integrated Schottky body diodes?
No. It uses standard TrenchMOS planar structure with inherent parasitic body diodes. Forward voltage (VSD) is 0.78–1.2 V at IS = 25 A and Tj = 25 °C (Table 10), and reverse recovery charge (Qr) is 18 nC - consistent with conventional MOSFET body diode behavior, not enhanced Schottky characteristics.
PSMN6R1-40HLX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-1205, 8-LFPAK56
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- MOSFET (Metal Oxide)
- Configuration:
- 2 N-Channel (Dual)
- FET Feature:
- Logic Level Gate
- Drain to Source Voltage (Vdss):
- 40V
- Current - Continuous Drain (Id) @ 25°C:
- 40A (Ta)
- Rds On (Max) @ Id, Vgs:
- 6.1mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 2.1V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 22.2nC @ 5V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3000pF @ 25V
- Power - Max:
- 64W (Ta)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK56D
PSMN6R1-40HLX FAQ
1.How can I place an order for PSMN6R1-40HLX through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN6R1-40HLX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN6R1-40HLX reliable?
The price and inventory of PSMN6R1-40HLX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN6R1-40HLX is usually 5 days.
3.What payment methods are accepted for PSMN6R1-40HLX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN6R1-40HLX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN6R1-40HLX?
PSMN6R1-40HLX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN6R1-40HLX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN6R1-40HLX?
For technical support, including PSMN6R1-40HLX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN6R1-40HLX requirements.
6.How does Aetrix verify that PSMN6R1-40HLX is sourced from the original manufacturer or authorized distributors?
All PSMN6R1-40HLX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN6R1-40HLX meets industry standards.
7.What is the process for return or replacement of PSMN6R1-40HLX?
All PSMN6R1-40HLX units undergo pre-shipment inspection (PSI). If there is an issue with PSMN6R1-40HLX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN6R1-40HLX part is unused and in its original packaging.
Return procedure for PSMN6R1-40HLX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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