Nexperia USA Inc. PSMN6R5-30MLDX
- Part No.:
- PSMN6R5-30MLDX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- SOT-1210, 8-LFPAK33 (5-Lead)
- Datasheet:
-
PSMN6R5-30MLDX.pdf
- Description:
- MOSFET N-CH 30V 65A LFPAK33
- Quantity:
- Payment:

- Shipping:

Inventory:7,171
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PSMN6R5-30MLDX from Nexperia is an N-channel 30 V logic-level MOSFET in LFPAK33 (SOT1210) package, featuring 6.5 mΩ RDS(on) at VGS = 10 V and 7 mΩ at 4.5 V, ultra-low QG (12.7 nC) and QGD (1.7–3 nC), and SchottkyPlus body diode technology enabling soft-recovery (s-factor > 1) with < 1 µA leakage at 25 °C. It serves as a high-efficiency synchronous rectifier or power switch in server DC-DC converters and POL modules.
For engineers reviewing the PSMN6R5-30MLDX datasheet, PSMN6R5-30MLDX pinout, PSMN6R5-30MLDX application, or PSMN6R5-30MLDX equivalent, key selection criteria include gate drive compatibility at 4.5 V, thermal resistance to mounting base (2.72 K/W), avalanche ruggedness (42.7 mJ), and LFPAK33 solder inspection capability via exposed leads.
Technical Context
This MOSFET employs Nexperia's NextPowerS3 architecture with SchottkyPlus body diode integration-delivering low reverse recovery charge (Qr = 12.6 nC) and soft recovery (trr = 23.8 ns, s-factor > 1) without elevated leakage. Its gate threshold voltage (VGS(th) = 1.2–2.2 V) ensures reliable turn-on with standard logic-level drivers.
The LFPAK33 package uses clip-bonded die attach and solder interconnects-no wire bonds or adhesive-enabling 175 °C junction rating, low parasitic inductance/resistance, and direct thermal path from die to mounting base (Rth(j-mb) = 2.72 K/W).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V maximum drain-source voltage - supports 24 V input rails with 20 % margin for transients |
| RDS(on) @ 4.5 V | 7 mΩ typical - enables efficient operation with 3.3 V/5 V microcontroller gate drive |
| RDS(on) @ 10 V | 5.5 mΩ typical - delivers lowest conduction loss in fixed 10 V gate-drive systems |
| QGD | 1.7–3 nC - minimizes switching loss and improves EMI performance at high frequencies |
| QG(tot) | 12.7 nC - reduces gate driver power demand and enables fast, controlled turn-on |
| trr / Qr | 23.8 ns / 12.6 nC - enables zero-voltage switching (ZVS) in synchronous rectification |
| Rth(j-mb) | 2.72 K/W - allows >50 W continuous power dissipation with moderate heatsinking on PCB |
Pinout & Package
LFPAK33 (SOT1210) is a leadless, clip-bonded surface-mount package with exposed copper mounting base connected to drain, optimized for thermal and electrical performance. It features no wire bonds or adhesive, qualified to 175 °C, and supports visual solder inspection via exposed leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source (S) | Three parallel source terminals reduce current density and package inductance |
| 4 | Gate (G) | Single low-inductance gate connection compatible with standard gate drivers |
| Mounting Base (mb) | Drain (D) | Exposed copper pad electrically and thermally connected to drain - primary heat path |
Key Features
| Feature | Design Value |
|---|---|
| SchottkyPlus body diode | Soft-recovery (s-factor > 1), Qr = 12.6 nC, VSD = 0.81 V @ 10 A - eliminates snubbers in synchronous rectifiers |
| Logic-level gate drive | VGS(th) = 1.2–2.2 V, fully enhanced at 4.5 V - interoperable with 3.3 V/5 V MCUs and PWM controllers |
| Ultra-low dynamic charge | QGD = 1.7–3 nC, QG(tot) = 12.7 nC - enables >1 MHz switching with minimal driver loss |
| High-reliability construction | Clip-bonded die, solder die attach, no glue/wire bonds - achieves 175 °C Tj rating and robust power cycling |
| Optimized thermal path | Rth(j-mb) = 2.72 K/W - delivers 51 W Ptot at Tmb = 25 °C with direct PCB copper thermal spreading |
Applications
| Server DC-DC Converters | Telecom VRMs |
|---|---|
Use Scenario: Secondary-side synchronous rectification in 48 V–12 V isolated buck converters for AI accelerators and CPU power delivery. IC Role / Device Role / Timing Role: High-side or low-side power switch operating at 300–600 kHz with ZVS, replacing Schottky diodes. Use Value: Reduces conduction loss by 40 % vs. 40 V Schottky, lowers case temperature by 12 °C at 40 A load due to 7 mΩ RDS(on) @ 4.5 V. | Use Scenario: Point-of-load (POL) regulation feeding FPGAs and ASICs in 5G baseband units requiring tight transient response. IC Role / Device Role / Timing Role: Low-side switch in multiphase buck converters with gate drive synchronized to controller PWM outputs. Use Value: Enables 95.2 % peak efficiency at 25 A due to ultra-low QGD and soft-recovery, minimizing output voltage ripple. |
| GPU Power Delivery | Brushless Motor Control |
Use Scenario: Core voltage regulation for discrete GPUs in gaming and workstation platforms, where rapid load steps exceed 100 A/µs. IC Role / Device Role / Timing Role: Synchronous rectifier in 3-phase interleaved buck stages, driven by dedicated gate drivers with adaptive dead-time control. Use Value: Limits VDS spike to < 32 V during hard commutation thanks to low ringing and 30 V VDS rating with margin. | Use Scenario: Half-bridge leg in 24 V BLDC motor drives for industrial automation, requiring bidirectional current handling and low EMI. IC Role / Device Role / Timing Role: Low-side switch conducting continuous 35 A with integrated body diode conducting freewheeling current during PWM off-time. Use Value: Eliminates external flyback diode; soft-recovery reduces EMI by 8 dBµV in 30–100 MHz band per CISPR-22 test. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel logic-level MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSMN2R8-30YLH | Lower RDS(on) (2.8 mΩ @ 10 V), higher QG (22 nC), same LFPAK56 package | Better conduction loss but slower switching; requires stronger gate driver | Select when system prioritizes steady-state efficiency over switching frequency >500 kHz |
| IRLHS6342TRPBF | SO-8 package, 3.5 mΩ @ 4.5 V, higher Rth(j-a) (57 K/W), no SchottkyPlus diode | Higher thermal resistance limits power density; lacks soft-recovery for ZVS | Select only for legacy SO-8 board reuse; avoid in new high-frequency synchronous rectifier designs |
Compared with PSMN2R8-30YLH and IRLHS6342TRPBF, PSMN6R5-30MLDX uniquely balances low RDS(on), ultra-low QGD, and SchottkyPlus soft-recovery-making it optimal for compact, high-frequency, high-efficiency POL and telecom VRM designs where thermal management and EMI are critical.
Availability
PSMN6R5-30MLDX is available at Aetrix Electronics and suitable for server DC-DC converters, telecom voltage regulator modules, and GPU power delivery systems requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production lots.
Supply support for PSMN6R5-30MLDX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors, with leadership in logic, discretes, and MOSFETs for industrial, computing, and communications markets.
This device belongs to the NextPowerS3 portfolio-designed specifically for high-efficiency, high-frequency power conversion in datacenter and telecom infrastructure, where low QGD, soft-recovery, and thermal robustness are mandatory.
FAQ
What is the maximum continuous drain current for PSMN6R5-30MLDX at 100 °C mounting base temperature?
At Tmb = 100 °C, the continuous drain current is 46 A (per Table 5 Limiting Values). This derating reflects thermal constraints of the LFPAK33 package and assumes proper PCB copper area for heat spreading. The value is measured under VGS = 10 V and accounts for RDS(on) increase with junction temperature.
Does PSMN6R5-30MLDX have avalanche capability, and how is it rated?
Yes-it is 100 % tested for non-repetitive avalanche energy: EAS = 42.7 mJ at ID = 15 A, Vsup ≤ 30 V, RGS = 50 Ω, VGS = 10 V, and Tj(init) = 25 °C (unclamped condition, tp = 146 µs). This rating supports robustness against inductive switching transients in motor and converter applications.
How does the SchottkyPlus body diode differ from a standard MOSFET body diode?
SchottkyPlus provides Schottky-like soft reverse recovery (trr = 23.8 ns, s-factor > 1, Qr = 12.6 nC) while maintaining < 1 µA leakage at 25 °C-unlike conventional Schottky diodes or cascoded structures. It eliminates voltage spikes and EMI during freewheeling without sacrificing blocking capability or thermal stability.
Can PSMN6R5-30MLDX be used with 3.3 V gate drive in production designs?
No-while VGS(th) starts at 1.2 V, full enhancement requires ≥4.5 V for specified RDS(on) (7 mΩ). At 3.3 V, RDS(on) rises sharply (>20 mΩ), increasing conduction loss by >2×. It is qualified and characterized for 4.5 V and 10 V gate drive only.
PSMN6R5-30MLDX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-1210, 8-LFPAK33 (5-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 65A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 6.5mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 2.2V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 13.6 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 817 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 51W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK33
PSMN6R5-30MLDX FAQ
1.How can I place an order for PSMN6R5-30MLDX through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN6R5-30MLDX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN6R5-30MLDX reliable?
The price and inventory of PSMN6R5-30MLDX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN6R5-30MLDX is usually 5 days.
3.What payment methods are accepted for PSMN6R5-30MLDX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSMN6R5-30MLDX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSMN6R5-30MLDX?
PSMN6R5-30MLDX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSMN6R5-30MLDX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSMN6R5-30MLDX?
For technical support, including PSMN6R5-30MLDX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN6R5-30MLDX requirements.
6.How does Aetrix verify that PSMN6R5-30MLDX is sourced from the original manufacturer or authorized distributors?
All PSMN6R5-30MLDX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN6R5-30MLDX meets industry standards.
7.What is the process for return or replacement of PSMN6R5-30MLDX?
All PSMN6R5-30MLDX units undergo pre-shipment inspection (PSI). If there is an issue with PSMN6R5-30MLDX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN6R5-30MLDX part is unused and in its original packaging.
Return procedure for PSMN6R5-30MLDX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PSMN6R5-30MLDX Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

