NXP Semiconductors PSMN9R0-30LL,115

Overview

PSMN9R0-30LL from Nexperia is a logic-level N-channel enhancement-mode MOSFET in DFN3333-8 (SOT873-1) package, rated for 30 V V_DS, 9 mΩ R_DS(on) at V_GS = 10 V and T_j = 25 °C, and qualified to 150 °C junction temperature. It delivers high-efficiency power switching in compact DC-to-DC converters and battery protection circuits.

For engineers reviewing the PSMN9R0-30LL datasheet, PSMN9R0-30LL pinout, PSMN9R0-30LL application, or PSMN9R0-30LL equivalent, key selection criteria include its 4.5 V logic-level gate drive compatibility, 21 A continuous drain current at T_mb = 25 °C, low 20.6 nC total gate charge, and thermal resistance of 1.9 K/W from junction to mounting base.

Technical Context

This MOSFET uses TrenchMOS technology to achieve low conduction losses and fast switching performance. Its gate threshold voltage ranges from 1.3 V to 2.15 V at 25 °C, enabling reliable turn-on with standard logic-level drivers. The device integrates an intrinsic body diode with 0.85 V forward voltage at 7.5 A and 22 nC reverse recovery charge.

Designed for surface-mount thermal management, the DFN3333-8 package features an exposed drain pad (pins 5–8) and three parallel source terminals (pins 1–3), supporting high-current routing and efficient heat transfer to the PCB. Avalanche energy rating is 32 mJ under unclamped inductive switching conditions.

Key Specifications

Pinout & Package

DFN3333-8 (SOT873-1) is a 3.3 mm × 3.3 mm × 1.0 mm thermal-enhanced no-lead package with exposed drain pad and 8 terminals. Mounting base (mb) serves as thermal and electrical connection point for drain.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel logic-level MOSFET applications.

Compared with PSMN9R0-30LL, PSMN1R0-30YLC,115 offers lower conduction loss but requires more gate drive energy and occupies more PCB area, while DMN3025LFG-7 provides superior R_DS(on) consistency and automotive qualification at higher unit cost and reduced availability in non-automotive channels.

Availability

PSMN9R0-30LL is available at Aetrix Electronics and suitable for battery protection, DC-to-DC converters, and load switching applications requiring stable component supply across industrial, computing, and communications equipment lifecycles.

Supply support for PSMN9R0-30LL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global leader in high-volume production of discrete semiconductors, logic ICs, and PowerMOS devices, spun off from NXP in 2017 and headquartered in Nijmegen, Netherlands.

The PSMN9R0-30LL belongs to Nexperia's Logic Level Power MOSFET product line, engineered for high-efficiency, space-constrained power management in industrial and consumer power systems where logic-compatible gate drive and thermal robustness are critical.

FAQ

What is the maximum continuous drain current rating for PSMN9R0-30LL?

The PSMN9R0-30LL has a maximum continuous drain current (I_D) of 21 A at mounting base temperature (T_mb) = 25 °C and V_GS = 10 V. At T_mb = 100 °C, the rating remains 21 A due to its thermal design, but derating applies above that temperature per Figure 1 in the datasheet. This rating assumes proper PCB copper area for heat dissipation.

Does PSMN9R0-30LL support 3.3 V logic-level gate drive?

Yes, PSMN9R0-30LL is specified as a logic-level MOSFET with V_GS(th) between 1.3 V and 2.15 V at 25 °C, and R_DS(on) = 10.6 mΩ typical at V_GS = 4.5 V and I_D = 5 A. It achieves full enhancement with 3.3 V microcontroller outputs, though R_DS(on) increases to ~13 mΩ at that drive level.

What is the thermal resistance from junction to mounting base for PSMN9R0-30LL?

The PSMN9R0-30LL has a typical thermal resistance from junction to mounting base (R_th(j-mb)) of 1.9 K/W, with a maximum of 4.5 K/W. This value is measured with the device mounted on a 40 mm × 40 mm × 70 µm copper pad at 20 °C ambient, and it defines the primary thermal path for high-power operation.

Can PSMN9R0-30LL be used in avalanche conditions?

Yes, PSMN9R0-30LL is rated for non-repetitive drain-source avalanche energy (E_DS(AL)S) of 32 mJ under specified test conditions (V_GS = 10 V, I_D = 40 A, V_sup ≤30 V, unclamped, R_GS = 50 Ω). This makes it suitable for inductive load switching where energy must be absorbed during turn-off.

What package type does PSMN9R0-30LL use and what are its dimensions?

PSMN9R0-30LL uses the DFN3333-8 package (JEDEC designation SOT873-1), measuring 3.3 mm × 3.3 mm × 1.0 mm with an exposed drain pad. It has eight terminals: three source pins (1–3), one gate pin (4), and four drain terminals (5–8), all designed for solder-reflow assembly and thermal conduction to the PCB.