Nexperia USA Inc. PSMN9R8-30MLC,115
- Part No.:
- PSMN9R8-30MLC,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- SOT-1210, 8-LFPAK33 (5-Lead)
- Datasheet:
-
PSMN9R8-30MLC,115.pdf
- Description:
- MOSFET N-CH 30V 50A LFPAK33
- Quantity:
- Payment:

- Shipping:

Inventory:284
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Product details
Overview
PSMN9R8-30MLC from Nexperia is a logic-level enhancement-mode N-channel MOSFET in LFPAK33 (SOT1210) package, rated for 30 V VDS, 9.8 mΩ RDS(on) at VGS = 10 V and 15 A, optimized for 4.5 V gate drive using NextPower Superjunction technology, and deployed in high-efficiency DC-to-DC converters and synchronous buck regulators.
For engineers reviewing the PSMN9R8-30MLC datasheet, PSMN9R8-30MLC pinout, PSMN9R8-30MLC application, or PSMN9R8-30MLC equivalent, this device delivers ultra-low QG, QGD, and QOSS for minimized switching losses, low parasitic inductance/resistance for high-frequency operation, and robust avalanche energy rating of 8 mJ - critical for reliable load switching and power stage design.
Technical Context
This MOSFET employs Nexperia's NextPower Superjunction architecture to achieve high cell density and low specific on-resistance while maintaining fast switching performance. Its gate threshold voltage (1.3–1.95 V) and plateau voltage (~3.1 V) enable stable turn-on with standard logic-level drivers.
The LFPAK33 package integrates a thermally enhanced mounting base connected directly to the drain, delivering Rth(j-mb) = 3.1–3.32 K/W and supporting 50 A continuous drain current at Tmb = 25 °C. The 4-pin configuration features triple-source terminals for reduced source inductance and improved current sharing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V maximum drain-source voltage - defines safe blocking capability in 24 V bus applications. |
| RDS(on) @ VGS = 10 V | 8.5–9.8 mΩ - enables <1 W conduction loss at 32 A, suitable for high-current synchronous rectification. |
| QG(tot) @ 4.5 V | 5 nC - reduces gate drive power and enables efficient operation with low-voltage controllers (e.g., microcontroller GPIOs). |
| QGD | 1.5 nC - minimizes Miller-induced switching delay and improves hard-switching robustness. |
| Rth(j-mb) | 3.1–3.32 K/W - allows >40 W power dissipation with modest heatsinking on PCB copper area. |
| EAS | 8 mJ non-repetitive avalanche energy - supports unclamped inductive switching in buck converter freewheeling phase. |
| VGS(th) | 1.3–1.95 V - ensures full enhancement with 3.3 V or 5 V logic-level gate signals without level-shifting. |
Pinout & Package
LFPAK33 (SOT1210) is a surface-mount plastic package with exposed mounting base (drain-connected), optimized for thermal and electrical performance in power switching applications. It features a compact 3.2 × 2.5 mm footprint and 0.9 mm profile.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source (S) | Three parallel source terminals reduce source loop inductance and improve current sharing in high-di/dt switching. |
| 4 | Gate (G) | Single gate input with typical RG = 1.8 Ω - enables precise gate control and damping without external series resistance. |
| Mounting Base | Drain (D) | Exposed copper pad electrically and thermally connected to drain - provides low-inductance, low-thermal-resistance path to PCB ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Logic-level gate drive compatibility | Full enhancement at VGS ≥ 4.5 V - eliminates need for gate driver ICs in 5 V or 3.3 V control systems. |
| Ultra-low gate charge | QG(tot) = 5 nC @ 4.5 V - cuts switching losses by >35% vs. comparable MOSFETs, enabling >1 MHz operation. |
| Optimized Superjunction structure | RDS(on) × QG = 49 mΩ·nC - achieves best-in-class figure-of-merit for high-frequency DC/DC conversion efficiency. |
| Triple-source terminal layout | Three independent S pins - lowers source inductance by ~40% vs. dual-source packages, reducing voltage overshoot during turn-off. |
| Avalanche-rated design | 8 mJ EAS - withstands unclamped inductive energy in synchronous buck freewheeling without derating. |
Applications
| DC-to-DC Converters | Load Switching |
|---|---|
Use Scenario: Point-of-load (POL) buck converters in telecom baseband cards and server VRMs. IC Role / Device Role: High-side synchronous rectifier switch handling up to 50 A continuous current. Use Value: 9.8 mΩ RDS(on) and 5 nC QG jointly reduce total power loss to <1.2 W at 30 A, improving system efficiency by 2.1% over legacy MOSFETs. |
Use Scenario: Hot-swap and power sequencing circuits in industrial PLC I/O modules. IC Role / Device Role: Low-side load switch controlling 12–24 V distribution rails with soft-start capability. Use Value: 1.64 V typical VGS(th) and 3.1 V gate plateau ensure clean, jitter-free turn-on under noisy 3.3 V control signals. |
| Synchronous Buck Regulator | Motor Drive Half-Bridge |
Use Scenario: 12 V input → 1.2 V output CPU core supply in embedded computing platforms. IC Role / Device Role: Low-side synchronous FET operating at 500 kHz–1 MHz with 4.5 V gate drive. Use Value: QGD/QG ratio of 0.3 enables minimal shoot-through risk and <12 ns turn-off delay for tight dead-time control. |
Use Scenario: 24 V BLDC motor gate driver stages in battery-powered power tools. IC Role / Device Role: High-current half-bridge low-side switch driving 3-phase inverter legs. Use Value: 202 A peak drain current and 175 °C max junction temperature support burst-mode operation under stall conditions without thermal shutdown. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel logic-level MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon BSC014N04LS6 | 40 V VDS, 1.4 mΩ RDS(on) @ 10 V, 12.5 nC QG, PG-TSDSON-8 package | Higher voltage rating but larger gate charge - less suitable for 3.3 V drive and high-frequency designs | Prefer when 40 V blocking margin is required and gate drive strength exceeds 1 A. |
| ON Semiconductor NTMFS4C09NT1G | 30 V VDS, 9.0 mΩ RDS(on) @ 10 V, 7.2 nC QG, SO-8FL package | SO-8FL has higher Rth(j-mb) (5.5 K/W) and no dedicated mounting base - limits power handling | Choose only for space-constrained layouts where thermal budget permits ≤25 W dissipation. |
Compared with BSC014N04LS6 and NTMFS4C09NT1G, the PSMN9R8-30MLC uniquely balances 30 V rating, 5 nC gate charge, and LFPAK33's 3.1 K/W thermal resistance - making it optimal for compact, high-efficiency 24 V DC/DC systems requiring logic-level drive and robust avalanche tolerance.
Availability
PSMN9R8-30MLC is available at Aetrix Electronics and suitable for DC-to-DC converters, load switching, and synchronous buck regulators requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for industrial and communications equipment.
Supply support for PSMN9R8-30MLC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete, logic, and MOSFET solutions, with leadership in automotive-qualified and industrial-grade power components.
This device belongs to Nexperia's NextPower Superjunction MOSFET product line, engineered specifically for high-efficiency, high-frequency power conversion in industrial, telecom, and consumer power supplies.
FAQ
What is the maximum continuous drain current for PSMN9R8-30MLC at 100 °C mounting base temperature?
The maximum continuous drain current is 36 A at Tmb = 100 °C and VGS = 10 V, as specified in Table 4 (Limiting Values). This derating reflects thermal constraints of the LFPAK33 package and must be verified against actual PCB copper area and airflow in the target application.
Does PSMN9R8-30MLC require a gate resistor for stability in high-speed switching?
A gate resistor is recommended: the device's typical gate resistance is 1.8 Ω, but external series resistance (2–10 Ω) is used to damp ringing, control dV/dt, and prevent false triggering in high-noise environments. Layout-dependent parasitics may necessitate tuning per application.
Can PSMN9R8-30MLC be used in avalanche mode repeatedly?
No - the 8 mJ avalanche energy rating (EAS) is specified for single-pulse, non-repetitive conditions. Repeated avalanche operation causes cumulative junction damage and is not guaranteed by Nexperia. Circuit design must avoid unclamped inductive switching during normal operation.
How does the triple-source pin configuration improve performance versus dual-source MOSFETs?
The three independent source terminals reduce total source loop inductance by distributing high di/dt current across parallel paths, lowering voltage overshoot during turn-off by up to 40%. This improves EMI performance and enables tighter dead-time control in half-bridge configurations.
PSMN9R8-30MLC,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-1210, 8-LFPAK33 (5-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 50A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 9.8mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 1.95V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 10.9 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 690 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 45W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK33
PSMN9R8-30MLC,115 FAQ
1.How can I place an order for PSMN9R8-30MLC,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PSMN9R8-30MLC,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSMN9R8-30MLC,115 reliable?
The price and inventory of PSMN9R8-30MLC,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSMN9R8-30MLC,115 is usually 5 days.
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Once your PSMN9R8-30MLC,115 order is processed, you will receive an email with the shipment details and tracking number.
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5.How can I obtain technical support or documentation for PSMN9R8-30MLC,115?
For technical support, including PSMN9R8-30MLC,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSMN9R8-30MLC,115 requirements.
6.How does Aetrix verify that PSMN9R8-30MLC,115 is sourced from the original manufacturer or authorized distributors?
All PSMN9R8-30MLC,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSMN9R8-30MLC,115 meets industry standards.
7.What is the process for return or replacement of PSMN9R8-30MLC,115?
All PSMN9R8-30MLC,115 units undergo pre-shipment inspection (PSI). If there is an issue with PSMN9R8-30MLC,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSMN9R8-30MLC,115 part is unused and in its original packaging.
Return procedure for PSMN9R8-30MLC,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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