Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Nexperia USA Inc. PXN7R7-25QLJ

Name: PXN7R7-25QLJ
Brand: Nexperia USA Inc.
SKU: PXN7R7-25QLJ
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: PXN7R7-25QLJ

Manufacturer:: Nexperia USA Inc.

Category:: FETs, MOSFETs

Package:: 8-PowerVDFN

Datasheet:: PXN7R7-25QLJ.pdf

Description:: PXN7R7-25QL/SOT8002/MLPAK33

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:5,317

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

PXN7R7-25QL from Nexperia is a 25 V, N-channel enhancement-mode Trench MOSFET in MLPAK33 (SOT8002-1) package, designed for low-side switching in high-efficiency DC-DC converters and battery management systems. It delivers R_DS(on) = 6.6 mΩ at V_GS = 10 V and T_j = 25 °C, total gate charge Q_G(tot) = 5.3 nC, ultra-low Q_GD, and soft-recovery diode behavior - enabling high-frequency operation with reduced EMI and spiking.

For engineers reviewing the PXN7R7-25QL datasheet, PXN7R7-25QL pinout, PXN7R7-25QL application, or PXN7R7-25QL equivalent, this device supports logic-level drive (V_GS(th) = 1.2–2.2 V), operates up to 150 °C junction temperature, and is optimized for thermally constrained PCB layouts requiring <3.3 × 3.3 mm footprint and high pulsed current capability (I_DM = 102 A).

Technical Context

This MOSFET uses Trench MOSFET technology to achieve ultra-low gate charge (Q_G(tot) = 5.3–8 nC) and minimized Q_GD, directly reducing switching losses in synchronous buck and load-switch topologies. Its integrated source-drain diode exhibits t_rr = 15 ns and Q_r = 6 nC, supporting soft-recovery behavior critical for low-noise power stages.

The device features a multi-drain/multi-source terminal configuration (4 drain, 3 source pins) in an 8-terminal MLPAK33 package, enabling low-inductance layout and enhanced thermal conduction via exposed drain pad. Thermal resistance R_th(j-sp) is 7–10 K/W to solder point, confirming suitability for compact, high-power-density designs without heatsinks.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	25 V maximum - defines safe blocking voltage in low-voltage DC-DC and battery-switching applications
R_DS(on) @ V_GS = 10 V	6.6–7.7 mΩ at T_j = 25 °C - enables ≤1.2 W conduction loss at 11.8 A continuous current
Q_G(tot)	5.3–8 nC at V_DS = 12.5 V - reduces gate-drive power and allows use with low-current drivers
t_r/t_f	8 ns rise / 3 ns fall - supports >1 MHz switching with minimal overlap loss
I_D (continuous)	11.8 A at T_amb = 25 °C - validated for sustained operation on standard FR4 with 6 cm² drain pad
E_AS	22.5 mJ unclamped avalanche energy - provides robustness against inductive switching transients
V_GS(th)	1.2–2.2 V - ensures reliable turn-on with 3.3 V or 5 V logic-level microcontrollers

Pinout & Package

MLPAK33 (SOT8002-1) is a thermally enhanced 8-terminal surface-mount plastic package measuring 3.3 × 3.3 × 0.8 mm, featuring an exposed drain pad for low thermal resistance (R_th(j-sp) = 7–10 K/W) and mini leads with 0.65 mm pitch.

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 3	Source	Three parallel source terminals reduce source inductance and improve current sharing in high-di/dt switching
4	Gate	Single gate input with RG = 2.3 Ω - enables stable, low-overshoot turn-on/turn-off control
5, 6, 7, 8	Drain	Four parallel drain terminals connected to internal die pad - maximize thermal path to PCB copper and minimize loop inductance

Key Features

Feature	Design Value
Logic-level gate drive	V_GS(th) = 1.2–2.2 V - eliminates need for level-shifting circuitry when driven by 3.3 V MCUs
Ultra-low Q_GD	1.5 nC - minimizes Miller-induced switching delay and dv/dt-induced false turn-on risk
Soft-recovery body diode	t_rr = 15 ns, Q_r = 6 nC - reduces voltage overshoot and EMI during freewheeling in synchronous rectification
Thermally optimized package	R_th(j-sp) = 7–10 K/W - enables 12.5 W power dissipation on FR4 with 6 cm² drain pad, no heatsink required
Low spiking/ringing	Minimal parasitic inductance from multi-terminal layout - simplifies EMI filter design in noise-sensitive applications

Applications

Battery Protection Circuit

USB-C Power Delivery Switch

Use Scenario: Bidirectional overcurrent and short-circuit protection in Li-ion battery packs using discrete MOSFET-based load switches.

IC Role / Device Role / Timing Role: Low-side N-channel switch controlling discharge path; activated within microseconds upon fault detection.

Use Value: R_DS(on) ≤ 7.7 mΩ limits voltage drop to <85 mV at 11 A, preserving battery runtime; avalanche rating handles inductive kickback from protection ICs.

Use Scenario: 5–20 V power path switching in USB-C PD sink applications where compact size and low thermal resistance are critical.

IC Role / Device Role / Timing Role: High-speed, low-loss power switch placed between connector and system rail; toggled during PDO negotiation or fault events.

Use Value: Logic-level compatibility enables direct MCU control; 3.3 × 3.3 mm MLPAK33 fits tight connector-area layouts while sustaining 102 A peak pulses during hot-plug events.

Point-of-Load DC-DC Converter

Industrial IoT Sensor Node Load Switch

Use Scenario: High-frequency (≥1 MHz) synchronous rectifier in 12 V input, 3.3/5 V output buck converters for FPGA or SoC power rails.

IC Role / Device Role / Timing Role: Synchronous FET in low-side position; commutated with precise dead-time control to avoid shoot-through.

Use Value: Q_G(tot) ≤ 8 nC and fast t_r/t_f reduce gate loss and enable efficient operation above 1 MHz; low Q_GD improves light-load efficiency.

Use Scenario: Controlled power gating of wireless transceivers and analog front-ends in battery-powered edge sensors to extend sleep-mode battery life.

IC Role / Device Role / Timing Role: Low-quiescent-current load switch enabling sub-µA off-state leakage and rapid wake-up (<1 µs turn-on).

Use Value: I_DSS ≤ 1 µA and IG_SS ≤ ±0.1 µA ensure negligible standby drain; 3-pin parallel source layout minimizes PCB trace inductance for clean power sequencing.

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel low-side switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ON Semiconductor NTMFS4C09NT1G	R_DS(on) = 7.0 mΩ @ 10 V; Q_G(tot) = 10.5 nC; SO-8FL package (5 × 6 mm)	Larger footprint and higher gate charge increase board area and driver requirements	Select when legacy SO-8 footprint compatibility is mandatory and thermal budget allows larger package
Vishay Si7157DP-T1-GE3	R_DS(on) = 8.5 mΩ @ 10 V; Q_G(tot) = 6.8 nC; PowerPAK® 1212-8 package (3.3 × 3.3 mm)	Slightly higher R_DS(on) increases conduction loss by ~28% at 11.8 A; same footprint but no multi-terminal drain/source	Select when supply chain diversification is needed and 0.5–1.0 V higher V_GS(th) tolerance exists in system design

Compared with NTMFS4C09NT1G and Si7157DP-T1-GE3, PXN7R7-25QL offers the lowest R_DS(on) in its footprint class and unique 4-drain/3-source layout that lowers both thermal resistance and switching loop inductance - making it optimal for space-constrained, high-frequency, and low-EMI applications where layout parasitics dominate performance.

Availability

PXN7R7-25QL is available at Aetrix Electronics and suitable for DC-DC conversion, battery management, and low-side load switching requiring stable component supply, consistent parametric performance across production lots, and long-term industrial lifecycle support.

Supply support for PXN7R7-25QL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - delivering discrete, logic, and MOSFET solutions optimized for efficiency, miniaturization, and manufacturability.

PXN7R7-25QL belongs to Nexperia's TrenchMOS® logic-level portfolio, engineered specifically for high-frequency power switching in space-constrained consumer, computing, and industrial applications where thermal performance and EMI control are design-critical.

FAQ

What is the maximum continuous drain current for PXN7R7-25QL at 100 °C ambient temperature?

At T_amb = 100 °C, the normalized continuous drain current derating is approximately 63% (per Fig. 2), resulting in I_D ≈ 7.5 A. This value is confirmed in Table 5 (Limiting Values) and accounts for thermal resistance to ambient on standard FR4 with 6 cm² drain pad - no additional heatsink required.

Does PXN7R7-25QL have avalanche capability, and how is it specified?

Yes, PXN7R7-25QL is rated for non-repetitive unclamped inductive switching with E_AS = 22.5 mJ at T_j(init) = 25 °C and I_D = 1.8 A (Table 5). This specification validates ruggedness against transient voltage spikes in relay-driving or motor-control circuits where inductive energy must be safely absorbed.

Can PXN7R7-25QL be driven directly by a 3.3 V microcontroller GPIO without a gate driver?

Yes - its V_GS(th) range (1.2–2.2 V) and guaranteed R_DS(on) at V_GS = 4.5 V (8.9–11.1 mΩ) confirm full enhancement with 3.3 V logic. At 11.8 A load, conduction loss remains ≤1.3 W, making direct GPIO drive viable for moderate-duty-cycle applications like load switching.

What is the recommended PCB footprint and solder mask layout for MLPAK33 (SOT8002-1)?

The official reflow footprint (Fig. 20) specifies a 2.65 × 2.65 mm solder land for the exposed drain pad, 0.65 mm pitch for 8 terminals, and 0.1 mm stencil thickness. Solder mask should fully expose the drain pad and align precisely with land edges to ensure void-free thermal attachment and mechanical reliability.

PXN7R7-25QLJ Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: TrenchMOS™

Package/Case:: 8-PowerVDFN

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 25 V

Current - Continuous Drain (Id) @ 25°C:: 11.8A (Ta), 32A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 4.5V, 10V

Rds On (Max) @ Id, Vgs:: 7.7mOhm @ 11.8A, 10V

Vgs(th) (Max) @ Id:: 2.2V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 16.6 nC @ 10 V

Vgs (Max):: ±20V

Input Capacitance (Ciss) (Max) @ Vds:: 770 pF @ 12.5 V

FET Feature:: -

Power Dissipation (Max):: 1.7W (Ta), 12.5W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: MLPAK33

PXN7R7-25QLJ FAQ

1.How can I place an order for PXN7R7-25QLJ through Aetrix?

Please submit a Request for Quotation (RFQ) for PXN7R7-25QLJ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PXN7R7-25QLJ reliable?

The price and inventory of PXN7R7-25QLJ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PXN7R7-25QLJ is usually 5 days.

3.What payment methods are accepted for PXN7R7-25QLJ?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PXN7R7-25QLJ transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PXN7R7-25QLJ?

PXN7R7-25QLJ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PXN7R7-25QLJ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PXN7R7-25QLJ?

For technical support, including PXN7R7-25QLJ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PXN7R7-25QLJ requirements.

6.How does Aetrix verify that PXN7R7-25QLJ is sourced from the original manufacturer or authorized distributors?

All PXN7R7-25QLJ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PXN7R7-25QLJ meets industry standards.

7.What is the process for return or replacement of PXN7R7-25QLJ?

All PXN7R7-25QLJ units undergo pre-shipment inspection (PSI). If there is an issue with PXN7R7-25QLJ, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PXN7R7-25QLJ part is unused and in its original packaging.

Return procedure for PXN7R7-25QLJ:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…