Nexperia USA Inc. PXN9R0-30QLJ

Overview

PXN9R0-30QLJ from Nexperia is a 30 V, N-channel enhancement-mode Trench MOSFET in MLPAK33 (SOT8002-1) package, designed for low-side load-switching and DC-DC converter power stages. It delivers R_DS(on) = 7.7 mΩ at V_GS = 10 V and T_j = 25 °C, supports 17.3 A continuous drain current (T_amb = 25 °C, t ≤ 5 s), and features logic-level gate drive compatibility down to 4.5 V.

For engineers reviewing the PXN9R0-30QLJ datasheet, PXN9R0-30QLJ pinout, PXN9R0-30QLJ application, or PXN9R0-30QLJ equivalent, key selection criteria include thermal resistance (R_th(j-sp) = 4.0–4.8 K/W), normalized R_DS(on) drift over temperature, peak pulse current capability (90 A), and MLPAK33 footprint compatibility with high-current PCB layouts.

Technical Context

This MOSFET uses Trench MOSFET technology to achieve low on-resistance and fast switching performance. Its gate threshold voltage (V_GS(th) = 1.0–2.5 V) enables reliable turn-on with standard logic-level drivers, while its integrated source-drain diode (V_SD = 0.7–1.2 V at I_S = 1.7 A) supports synchronous rectification and freewheeling in buck converters.

The device operates within an absolute maximum junction temperature of 150 °C and ambient range of −55 to +150 °C. Its safe operating area (SOA) is defined up to 90 A peak drain current (t_p ≤ 10 µs) and 30 V V_DS, with derating curves provided for continuous operation across ambient temperature and PCB copper area.

Key Specifications

Pinout & Package

MLPAK33 (SOT8002-1) is a thermally enhanced 8-terminal surface-mount package measuring 3.3 × 3.3 × 0.8 mm with 0.65 mm pitch, featuring four parallel drain terminals and three parallel source terminals for low-inductance, high-current routing and improved thermal dissipation via exposed drain pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel low-side switching applications.

Compared with BSC014N04LS6 and NTMFS4C09NT1G, the PXN9R0-30QLJ offers optimal balance of ultra-low R_DS(on), compact MLPAK33 footprint, and guaranteed 4.5 V logic compatibility-making it preferred for space- and efficiency-critical 12–24 V low-side switching where gate drive headroom is limited.

Availability

PXN9R0-30QLJ is available at Aetrix Electronics and suitable for battery management, DC-DC converters, and industrial load-switching applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized channels.

Supply support for PXN9R0-30QLJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in MOSFETs, ESD protection, and logic ICs for automotive, industrial, and consumer markets.

The PXN9R0-30QLJ belongs to Nexperia's TrenchMOS® logic-level power MOSFET product line, engineered specifically for high-efficiency, space-constrained low-voltage power switching in battery-powered and embedded systems.

FAQ

What is the maximum continuous drain current for PXN9R0-30QLJ under standard PCB conditions?

The maximum continuous drain current is 11.4 A at T_amb = 25 °C with FR4 PCB (single-sided copper, 6 cm² drain pad). At T_amb = 100 °C, this derates to 7.2 A. The 17.3 A rating applies only for short-duration pulses (t ≤ 5 s) under identical thermal conditions.

Does PXN9R0-30QLJ require a gate resistor for stability in switching applications?

A gate resistor is recommended to control dV/dt and prevent oscillation, especially in high-frequency (>500 kHz) or high-di/dt environments. Typical values range from 2.2 Ω to 10 Ω, selected based on driver strength and required turn-on/turn-off timing per the 13.8–20.7 nC total gate charge.

Can PXN9R0-30QLJ be used in avalanche-rated circuits?

No-this device is not rated for repetitive avalanche operation. Its datasheet does not specify avalanche energy (E_AS) or unclamped inductive switching (UIS) capability. Designers must ensure operation remains within the SOA curve and avoid inductive switching without clamping.

How does the MLPAK33 package improve thermal performance over standard SO-8?

The MLPAK33 reduces R_th(j-sp) to 4.0–4.8 K/W versus ~30–40 K/W for SO-8, by integrating a large exposed drain pad directly soldered to PCB copper. This provides 6× lower thermal resistance to the board, enabling higher power density without external heatsinks.