Nexperia USA Inc. PXP3R7-12QUJ

Overview

PXP3R7-12QUJ from Nexperia is a 12 V, P-channel enhancement-mode Trench MOSFET in MLPAK33 (SOT8002-1) package, designed for high-side load switching with R_DS(on) = 3.2 mΩ at V_GS = −4.5 V and I_D = −18.6 A, T_j = 25 °C; rated for continuous drain current up to −18.7 A at 25 °C ambient; optimized for battery management and DC-DC conversion.

For engineers reviewing the PXP3R7-12QUJ datasheet, PXP3R7-12QUJ pinout, PXP3R7-12QUJ application, or PXP3R7-12QUJ equivalent, key selection criteria include low threshold voltage (V_GS(th) = −0.47 to −0.9 V), thermal resistance R_th(j-sp) = 1.5–2.5 K/W, peak drain current of −154 A, and 8-terminal source-gate-drain configuration for high-current PCB mounting.

Technical Context

This P-channel MOSFET uses Trench technology to achieve low on-resistance and fast switching with Q_G(tot) = 75–110 nC and t_f = 177 ns under specified conditions. Its gate threshold voltage range (−0.47 to −0.9 V) enables reliable turn-on with logic-level gate drive down to −1.8 V.

The device features integrated source-drain diode (V_SD = −0.7 to −1.2 V at I_S = −1.7 A), operates across −55 to +150 °C junction temperature, and delivers 50 W total power dissipation at T_sp = 25 °C with optimized thermal path via drain pad.

Key Specifications

Pinout & Package

MLPAK33 (SOT8002-1) is a thermally enhanced 8-terminal surface-mount package measuring 3.3 × 3.3 × 0.8 mm with 0.65 mm pitch, featuring exposed drain pads on terminals 5–8 and triple-source connection (pins 1–3) for low-inductance, high-current routing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar P-channel MOSFET applications.

Compared with BSC014N04LS and SI3457DV, PXP3R7-12QUJ uniquely balances logic-level gate drive, ultra-low R_DS(on), and high thermal power density in a compact 8-terminal layout-making it optimal for 12 V systems demanding both efficiency and board-level reliability without external thermal management.

Availability

PXP3R7-12QUJ is available at Aetrix Electronics and suitable for high-side load switching, battery management, and DC-DC conversion requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial and medical OEM programs.

Supply support for PXP3R7-12QUJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in advanced packaging and automotive-qualified components.

The PXP3R7-12QUJ belongs to Nexperia's TrenchMOS® P-channel portfolio, engineered specifically for high-efficiency, low-voltage power switching in space- and thermally constrained applications such as portable electronics and distributed power systems.

FAQ

What is the maximum continuous drain current for PXP3R7-12QUJ at 100 °C ambient temperature?

The maximum continuous drain current is −11.8 A at T_amb = 100 °C, as specified in Table 5 (Limiting values) under V_GS = −4.5 V condition. This derating reflects thermal limitations of the MLPAK33 package on standard FR4 PCBs with 6 cm² drain pad, and must be verified against actual board layout and airflow conditions.

Does PXP3R7-12QUJ have an integrated body diode, and what is its forward voltage?

Yes, PXP3R7-12QUJ includes an inherent source-drain diode with V_SD = −0.7 to −1.2 V at I_S = −1.7 A and T_j = 25 °C (Table 7). This diode is intrinsic to the MOSFET structure and supports freewheeling current in inductive switching applications without requiring external components.

Can PXP3R7-12QUJ be driven directly by a 3.3 V microcontroller GPIO without a level shifter?

Yes - its gate threshold voltage range (−0.47 to −0.9 V) and guaranteed R_DS(on) of 4.1–5.1 mΩ at V_GS = −2.5 V allow full enhancement using 3.3 V logic. However, for lowest R_DS(on) (3.2 mΩ), −4.5 V gate drive is recommended, achievable via simple resistive pull-up to −4.5 V bias or dedicated gate driver.

What is the recommended PCB footprint and soldering profile for MLPAK33 (SOT8002-1)?

The official reflow footprint (Figure 19) specifies 2.65 mm × 2.45 mm solder lands for drain terminals, 0.65 mm pitch, and 0.1 mm stencil thickness. Reflow must follow JEDEC J-STD-020 profile for MSL1 devices, with peak temperature ≤ 260 °C and time above liquidus 60–90 s, per Nexperia's SOT8002-1 soldering guidelines.