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Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Renesas RJK03P7DPA-WS#J5A

Name: RJK03P7DPA-WS#J5A
Brand: Renesas
SKU: RJK03P7DPA-WS#J5A
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: RJK03P7DPA-WS#J5A

Manufacturer:: Renesas

Category:: FETs, MOSFETs

Package:: -

Datasheet:: RJK03P7DPA-WS#J5A.pdf

Description:: N-CHANNEL POWER MOSFET

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Product details

Overview

RJK03P7DPA-WS#J5A from Renesas Electronics is a dual-channel N-channel power MOSFET with integrated Schottky barrier diode in a single WPAK-D(3) package. It integrates MOS1 (30 V, 15 A, 9.4 mΩ max at 10 V) and MOS2 (30 V, 30 A, 5.3 mΩ max at 10 V), enabling high-efficiency synchronous rectification and bidirectional switching in DC-DC converters for server VRMs and industrial power supplies.

For engineers reviewing the RJK03P7DPA-WS#J5A datasheet, RJK03P7DPA-WS#J5A pinout, RJK03P7DPA-WS#J5A application, or RJK03P7DPA-WS#J5A equivalent, key selection criteria include verified 4.5 V gate drive capability, dual-channel thermal coupling in a shared case, and confirmed SBD integration for reduced reverse recovery loss in high-frequency buck topologies.

Technical Context

This device implements two independently controlled N-channel MOSFETs sharing a common source terminal (Pin 5–7, Pin 9) and thermally coupled die in a single WPAK-D(3) leadframe package. MOS1 and MOS2 feature distinct R_DS(on) curves, gate charge profiles (Q_g = 7.1 nC / 16.5 nC), and safe operating area limits - enabling asymmetric duty-cycle control in multiphase converters.

The integrated Schottky barrier diode connects between MOS2's drain (Pin 2–4, Pin 9) and source (Pin 5–7), providing unidirectional freewheeling path with 0.46 V forward voltage at 2 A. Its trr of 6.6 ns eliminates minority-carrier recovery delay, supporting switching frequencies up to 1 MHz without snubber circuits.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DSS	30 V for both MOS1 and MOS2 - supports 24 V input rail systems with 20 % margin against transients.
R_DS(on) (MOS1)	9.4 mΩ max at V_GS = 10 V, I_D = 7.5 A - enables <1.8 W conduction loss at 15 A continuous current.
R_DS(on) (MOS2)	5.3 mΩ max at V_GS = 10 V, I_D = 15 A - delivers <2.4 W conduction loss at 30 A peak current in pulse mode.
Q_g	7.1 nC (MOS1), 16.5 nC (MOS2) - determines gate driver sizing; MOS2 requires ~2.3× higher drive strength than MOS1.
V_F (SBD)	0.46 V typ at I_F = 2 A - reduces freewheeling loss by >40 % versus body diode in synchronous rectifier operation.
t_r/t_f	1.7 ns / 3.5 ns (MOS1), 2.9 ns / 11.4 ns (MOS2) - supports clean edge transitions with minimal overlap loss in 500 kHz–1 MHz PWM.
T_ch max	150 °C - defines maximum junction temperature for thermal design; θ_ch–c = 6.25 °C/W for MOS2 channel.

Pinout & Package

Package: WPAK-D(3), Renesas code PWSN0008DD-B, 8-pin exposed-pad surface-mount package with 0.45 mm pitch, Sn-plated leads, and 0.07 g mass. Thermal pad (Pin 9) must be soldered to PCB ground plane for optimal heat dissipation.

Pin/Terminal	Circuit Role	Design Meaning
1, 8	Gate of MOS1 (G1)	Independent control input for high-side or low-side switch; requires dedicated gate resistor per channel.
2, 3, 4, 9	Drain of MOS1 and MOS2 (D1/D2)	Common drain node for both FETs and SBD anode; electrically tied internally; connects to input/bus rail.
5, 6, 7, 9	Source of MOS1 and MOS2 (S1/S2)	Common source node; Pin 9 is thermal pad and electrical source connection - must be grounded.
G2	Gate of MOS2	Labeled as Pin 8 in bottom view but functionally distinct from G1; Pin 8 is G1 per outline diagram - G2 is not separately assigned; device has only two gate terminals (Pins 1 & 8), both labeled G1/G2 in functional block - confirming dual independent gates.

Key Features

Feature	Design Value
Integrated Schottky Barrier Diode	Replaces external SBD in synchronous rectifier designs, eliminating layout parasitics and reducing component count by one discrete part.
4.5 V Gate Drive Compatibility	Enables direct interface with standard logic-level PWM controllers without level-shifting circuitry for both MOS1 and MOS2 channels.
Thermally Coupled Dual Die	Shared case construction allows coordinated thermal management - critical for phase-balanced current sharing in multiphase VRMs.
Pb-Free & Halogen-Free Construction	Meets RoHS Directive 2011/65/EU and JEDEC J-STD-609A Class 1 moisture sensitivity - suitable for lead-free reflow assembly.

Applications

Server Voltage Regulator Modules	Industrial DC-DC Converters
Use Scenario: Multiphase buck converter supplying core voltage to Xeon or EPYC CPUs with dynamic load steps up to 300 A/μs. IC Role / Device Role / Timing Role: MOS2 acts as high-current synchronous rectifier; MOS1 serves as control FET or auxiliary switch; integrated SBD clamps inductive kick during dead-time. Use Value: 5.3 mΩ R_DS(on) and 0.46 V SBD forward drop reduce total conduction loss by 22 % versus discrete dual-FET + external diode solution at 200 A output.	Use Scenario: Isolated half-bridge secondary-side synchronous rectifier in 48 V–12 V telecom power supply. IC Role / Device Role / Timing Role: MOS1 and MOS2 operate in complementary mode across transformer secondary winding; SBD provides zero-voltage switching assist during transition. Use Value: 6.6 ns SBD reverse recovery time enables >85 % efficiency at 1 MHz switching frequency without additional snubbers or gate timing compensation.
Automotive ADAS Power Management	High-Density Point-of-Load Regulators
Use Scenario: 12 V input, 3.3 V/20 A output for radar ECU power rail with strict thermal envelope (<40 °C ambient). IC Role / Device Role / Timing Role: MOS2 handles main power path; MOS1 manages pre-bias startup or auxiliary bias generation; shared thermal pad minimizes hotspot formation. Use Value: 6.25 °C/W θ_ch–c for MOS2 allows full 30 A pulse current within 150 °C T_ch limit using 2-layer 2 oz copper PCB - no heatsink required.	Use Scenario: Compact 5 V/15 A POL module on FPGA carrier board with <10 mm² footprint constraint. IC Role / Device Role / Timing Role: Dual FETs implement interleaved buck stages; integrated SBD replaces discrete diode in bootstrap path for high-side gate drive. Use Value: WPAK-D(3) package (5.1 mm × 3.92 mm) achieves 42 % smaller board area than dual-SO-8 solution while maintaining 9.4 mΩ/5.3 mΩ R_DS(on) performance.

Server Voltage Regulator Modules

Industrial DC-DC Converters

Use Scenario: Multiphase buck converter supplying core voltage to Xeon or EPYC CPUs with dynamic load steps up to 300 A/μs.

IC Role / Device Role / Timing Role: MOS2 acts as high-current synchronous rectifier; MOS1 serves as control FET or auxiliary switch; integrated SBD clamps inductive kick during dead-time.

Use Value: 5.3 mΩ R_DS(on) and 0.46 V SBD forward drop reduce total conduction loss by 22 % versus discrete dual-FET + external diode solution at 200 A output.

Use Scenario: Isolated half-bridge secondary-side synchronous rectifier in 48 V–12 V telecom power supply.

IC Role / Device Role / Timing Role: MOS1 and MOS2 operate in complementary mode across transformer secondary winding; SBD provides zero-voltage switching assist during transition.

Use Value: 6.6 ns SBD reverse recovery time enables >85 % efficiency at 1 MHz switching frequency without additional snubbers or gate timing compensation.

Automotive ADAS Power Management

High-Density Point-of-Load Regulators

Use Scenario: 12 V input, 3.3 V/20 A output for radar ECU power rail with strict thermal envelope (<40 °C ambient).

IC Role / Device Role / Timing Role: MOS2 handles main power path; MOS1 manages pre-bias startup or auxiliary bias generation; shared thermal pad minimizes hotspot formation.

Use Value: 6.25 °C/W θ_ch–c for MOS2 allows full 30 A pulse current within 150 °C T_ch limit using 2-layer 2 oz copper PCB - no heatsink required.

Use Scenario: Compact 5 V/15 A POL module on FPGA carrier board with <10 mm² footprint constraint.

IC Role / Device Role / Timing Role: Dual FETs implement interleaved buck stages; integrated SBD replaces discrete diode in bootstrap path for high-side gate drive.

Use Value: WPAK-D(3) package (5.1 mm × 3.92 mm) achieves 42 % smaller board area than dual-SO-8 solution while maintaining 9.4 mΩ/5.3 mΩ R_DS(on) performance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-N-channel power MOSFET with integrated diode applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SiR872DP-T1-GE3	Single-channel 30 V, 40 A, 3.1 mΩ MOSFET with integrated Schottky; no second FET channel.	Suitable only for single-phase or non-interleaved topologies requiring higher current per channel.	Select when needing higher peak current per switch but willing to use two separate devices for dual-channel control.
IPB033N04LGATMA1	Dual-channel 40 V, 33 A/33 A, 3.3 mΩ/3.3 mΩ TSDSO-12 package; no integrated diode.	Requires external Schottky for freewheeling; higher V_DSS margin but larger footprint (6.1 mm × 5.1 mm vs. 5.1 mm × 3.92 mm).	Choose for 40 V system compatibility and symmetric dual-channel R_DS(on), accepting added BOM cost and layout complexity.

Compared with SiR872DP-T1-GE3 and IPB033N04LGATMA1, RJK03P7DPA-WS#J5A uniquely combines asymmetric dual-channel current rating (15 A / 30 A), integrated SBD, and compact WPAK-D(3) footprint - making it optimal for space-constrained, high-frequency multiphase buck converters where channel asymmetry matches load distribution.

Availability

RJK03P7DPA-WS#J5A is available at Aetrix Electronics and suitable for server VRMs, industrial DC-DC converters, and automotive ADAS power modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for RJK03P7DPA-WS#J5A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and datacenter markets.

The RJK03P7DPA-WS#J5A belongs to Renesas' Power MOSFET family designed specifically for high-efficiency, high-density DC-DC conversion in computing and communications infrastructure.

FAQ

What is the maximum continuous drain current rating for each channel of the RJK03P7DPA-WS#J5A?

RJK03P7DPA-WS#J5A specifies 15 A continuous drain current (I_D) for MOS1 and 30 A for MOS2 at T_c = 25 °C. Derating applies above 25 °C case temperature - e.g., MOS2 delivers ~22 A at T_c = 75 °C per the power vs. temperature derating curve on page 4 of the datasheet. These ratings assume proper PCB copper area and thermal via design under the exposed pad (Pin 9).

Does the RJK03P7DPA-WS#J5A support 3.3 V gate drive, or is 4.5 V the absolute minimum?

The RJK03P7DPA-WS#J5A is characterized for reliable operation down to 4.5 V gate drive - R_DS(on) values are guaranteed at V_GS = 4.5 V (9.7 mΩ for MOS1, 5.4 mΩ for MOS2). At 3.3 V, the device remains functional but R_DS(on) increases significantly beyond datasheet limits; therefore, 4.5 V is the practical minimum for specified performance. No characterization data is provided for 3.3 V operation.

How is the Schottky Barrier Diode connected internally in the RJK03P7DPA-WS#J5A?

In the RJK03P7DPA-WS#J5A, the Schottky Barrier Diode is connected between the common drain node (Pins 2, 3, 4, 9) and the common source node (Pins 5, 6, 7, 9), with its anode at the drain and cathode at the source - matching the polarity of MOS2's body diode but with lower V_F and faster trr. This configuration enables it to conduct during MOS2's off-state in synchronous rectifier applications.

Can both MOSFET channels in the RJK03P7DPA-WS#J5A be used simultaneously in a synchronous buck stage?

Yes - RJK03P7DPA-WS#J5A is explicitly designed for synchronous buck operation: MOS2 typically serves as the high-current synchronous rectifier (low-side), while MOS1 can function as the control FET (high-side) or auxiliary switch. Their independent gates (Pins 1 and 8), shared source (Pins 5–7, 9), and common drain (Pins 2–4, 9) allow standard gate-drive sequencing with dead-time control to prevent shoot-through.

What is the thermal resistance from channel to case (θ_ch–c) for each MOSFET in the RJK03P7DPA-WS#J5A?

The RJK03P7DPA-WS#J5A datasheet specifies θ_ch–c = 12.5 °C/W for MOS1 and 6.25 °C/W for MOS2 (page 6 and 8). These values reflect the different die sizes and thermal paths - MOS2's lower value confirms its higher power handling capability and mandates attention to PCB copper area under the thermal pad (Pin 9) to maintain T_ch ≤ 150 °C.

RJK03P7DPA-WS#J5A Specifications

Product attributes: Attribute value

Manufacturer:: Renesas

Series:: *

Package/Case:: -

Packaging:: Bulk

Product Status:: Active

FET Type:: -

Technology:: -

Drain to Source Voltage (Vdss):: -

Current - Continuous Drain (Id) @ 25°C:: -

Drive Voltage (Max Rds On, Min Rds On):: -

Rds On (Max) @ Id, Vgs:: -

Vgs(th) (Max) @ Id:: -

Gate Charge (Qg) (Max) @ Vgs:: -

Vgs (Max):: -

Input Capacitance (Ciss) (Max) @ Vds:: -

FET Feature:: -

Power Dissipation (Max):: -

Operating Temperature:: -

Grade:: -

Qualification:: -

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Supplier Device Package:: -

RJK03P7DPA-WS#J5A FAQ

1.How can I place an order for RJK03P7DPA-WS#J5A through Aetrix?

Please submit a Request for Quotation (RFQ) for RJK03P7DPA-WS#J5A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for RJK03P7DPA-WS#J5A reliable?

The price and inventory of RJK03P7DPA-WS#J5A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RJK03P7DPA-WS#J5A is usually 5 days.

3.What payment methods are accepted for RJK03P7DPA-WS#J5A?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RJK03P7DPA-WS#J5A transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for RJK03P7DPA-WS#J5A?

RJK03P7DPA-WS#J5A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your RJK03P7DPA-WS#J5A order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for RJK03P7DPA-WS#J5A?

For technical support, including RJK03P7DPA-WS#J5A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RJK03P7DPA-WS#J5A requirements.

6.How does Aetrix verify that RJK03P7DPA-WS#J5A is sourced from the original manufacturer or authorized distributors?

All RJK03P7DPA-WS#J5A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RJK03P7DPA-WS#J5A meets industry standards.

7.What is the process for return or replacement of RJK03P7DPA-WS#J5A?

All RJK03P7DPA-WS#J5A units undergo pre-shipment inspection (PSI). If there is an issue with RJK03P7DPA-WS#J5A, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The RJK03P7DPA-WS#J5A part is unused and in its original packaging.

Return procedure for RJK03P7DPA-WS#J5A:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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