Renesas RJK5012DPE-00#J3
- Part No.:
- RJK5012DPE-00#J3
- Manufacturer:
- Renesas
- Category:
- FETs, MOSFETs
- Package:
- SC-83
- Datasheet:
-
RJK5012DPE-00#J3.pdf
- Description:
- MOSFET N-CH 500V 12A 4LDPAK
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
RJK5012DPE-00#J3 from Renesas Electronics is a silicon N-channel power MOSFET designed for high-speed switching in 500 V DC-link applications, featuring RDS(on) = 0.515 Ω (typ. at ID = 6 A, VGS = 10 V), 12 A continuous drain current, and 24 A pulsed drain capability - deployed in industrial AC/DC PFC stages and motor drive half-bridges.
For engineers reviewing the RJK5012DPE-00#J3 datasheet, RJK5012DPE-00#J3 pinout, RJK5012DPE-00#J3 application, or RJK5012DPE-00#J3 equivalent, key selection criteria include avalanche energy rating (0.88 mJ), body-diode reverse recovery time (280 ns), gate charge (29 nC), and LDPAK(S)-(1) thermal performance (θch–c = 1.25 °C/W).
Technical Context
This MOSFET employs a planar trench-gate structure optimized for fast turn-on/turn-off with low Qgd/Qg ratio (13/29 nC), enabling efficient hard-switching in 400 V bus converters. Its VGS(off) range (3.0–4.5 V) ensures robust noise immunity in noisy industrial environments.
The integrated body diode supports synchronous rectification and freewheeling in bridge topologies, with confirmed VDF = 0.89 V (typ. at IF = 12 A) and trr = 280 ns under di/dt = 100 A/μs - critical for minimizing commutation losses in LLC and phase-shifted full-bridge designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDSS | 500 V - supports DC-link operation up to 400 V nominal with 25% safety margin against transients |
| RDS(on) | 0.515 Ω typ. - enables ≤3.7 W conduction loss at 12 A continuous, suitable for thermally constrained PCB layouts |
| Qg | 29 nC - determines gate driver power requirement (~1.16 mW at 100 kHz, VGS swing = 10 V) |
| tr/tf | 23 ns / 16 ns - allows <500 kHz switching in ZVS-assisted topologies without excessive EMI generation |
| θch–c | 1.25 °C/W - permits 100 W channel dissipation with ≤125 °C case temperature rise above ambient |
| trr | 280 ns - limits reverse recovery charge Qrr to ~3.36 μC, reducing cross-conduction risk in half-bridge leg |
| IAP | 4 A - defines single-pulse avalanche withstand capability under unclamped inductive switching (UIS) |
Pinout & Package
Package: LDPAK(S)-(1) (RENESAS code PRSS0004AE-B), surface-mount, thermally enhanced 4-pin leadless package with dual-drain configuration for reduced source inductance and improved thermal path to PCB copper.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Control terminal; requires 10 V drive for full enhancement; ±30 V absolute max rating prevents ESD damage |
| 2 (D) | Drain | Main high-side power terminal; electrically connected to exposed die paddle; must be routed with low-inductance layout |
| 3 (S) | Source | Power return reference; serves as local ground for gate drive loop; low-inductance connection critical for dV/dt immunity |
| 4 (D) | Drain | Second drain terminal - paralleled internally with Pin 2 to halve effective drain inductance and improve current sharing |
Key Features
| Feature | Design Value |
|---|---|
| Low RDS(on) × Qg figure-of-merit | 14.9 Ω·nC - balances conduction and switching loss for 100–300 kHz SMPS designs |
| Fast body-diode recovery | trr = 280 ns with soft recovery waveform - reduces voltage overshoot and snubber stress in bridge-leg commutation |
| Dual-drain thermal & electrical configuration | Two separate drain terminals (Pins 2 & 4) - lowers package inductance by ~35% vs. single-drain equivalents |
| Avalanche-rated operation | 0.88 mJ single-pulse energy - enables reliable unclamped inductive switching in motor control fault conditions |
| High VGSS tolerance | ±30 V - accommodates gate drive overshoot in high-dV/dt environments without latch-up or degradation |
Applications
| Industrial Motor Drive Inverter | Server PSU Active Clamp Forward |
|---|---|
|
Use Scenario: Half-bridge leg in 750 W BLDC inverter for HVAC compressors operating at 20 kHz PWM. IC Role / Device Role / Timing Role: High-side power switch handling 12 A RMS phase current with 500 V DC-link. Use Value: Low Qgd (13 nC) minimizes Miller-induced shoot-through risk during high dV/dt transitions across the bridge. |
Use Scenario: Clamp switch in active-clamp forward converter for 1U server PSUs with 380 V DC input. IC Role / Device Role / Timing Role: Synchronous clamp FET resetting transformer flux with zero-voltage turn-on. Use Value: 280 ns trr ensures clean demagnetization without reverse recovery oscillation, improving efficiency by 0.8% at full load. |
| Photovoltaic String Inverter DC-Link | Industrial UPS Output Stage |
|
Use Scenario: DC-link switching in 5 kW string inverter with MPPT stage feeding 400 V bus. IC Role / Device Role / Timing Role: Unidirectional 500 V blocking switch in boost pre-regulator stage. Use Value: 0.515 Ω RDS(on) limits conduction loss to 7.4 W at 12 A, enabling natural convection cooling. |
Use Scenario: Output H-bridge in online double-conversion UPS delivering 230 VAC sine wave. IC Role / Device Role / Timing Role: Low-side switching element in 10 kHz SPWM output stage. Use Value: Dual-drain layout (Pins 2 & 4) reduces source inductance, improving gate control stability during load transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STP12NK50ZFP | RDS(on) = 0.58 Ω (higher), Qg = 32 nC (higher), TO-220FP package (higher θJA) | Limited to ≤100 kHz due to higher Ciss (1350 pF) and slower tf (25 ns) | Acceptable where cost sensitivity outweighs efficiency and board space constraints |
| IXTH12N50L2 | RDS(on) = 0.48 Ω (lower), Qg = 42 nC (higher), TO-247 package (superior heatsinking) | Better thermal headroom but larger footprint; trr = 320 ns (slower body diode) | Preferred when >100 W continuous dissipation or forced-air cooling is available |
Compared with STP12NK50ZFP and IXTH12N50L2, the RJK5012DPE-00#J3 delivers optimal balance of low gate charge, fast switching, and compact LDPAK thermal performance - making it ideal for space-constrained 50–200 W per switch industrial power stages where layout inductance and thermal resistance are critical.
Availability
RJK5012DPE-00#J3 is available at Aetrix Electronics and suitable for industrial motor drives, photovoltaic inverters, and uninterruptible power supplies requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for RJK5012DPE-00#J3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, power, and mixed-signal ICs for industrial, automotive, and infrastructure markets.
The RJK5012DPE-00#J3 belongs to Renesas' high-voltage power MOSFET product line, engineered specifically for ruggedized 400–500 V DC-link switching in industrial power conversion systems demanding reliability under repetitive avalanche and high dv/dt stress.
FAQ
What is the maximum continuous drain current rating for the RJK5012DPE-00#J3?
The RJK5012DPE-00#J3 has a rated continuous drain current (ID) of 12 A at Tc = 25 °C. This rating assumes proper PCB copper area for thermal conduction and derates linearly with increasing case temperature - down to approximately 6.5 A at Tc = 100 °C per the RDS(on) vs. temperature curve on page 3 of the datasheet. The RJK5012DPE-00#J3 must be operated within its Safe Operating Area (SOA) limits shown on page 3.
Does the RJK5012DPE-00#J3 have an integrated body diode, and what are its key parameters?
Yes, the RJK5012DPE-00#J3 includes an integral body-drain diode with VDF = 0.89 V (typ. at IF = 12 A, VGS = 0) and reverse recovery time trr = 280 ns (typ. at IF = 12 A, di/dt = 100 A/μs). These values are measured under pulse conditions and confirm suitability for freewheeling and synchronous rectification in hard-switched topologies. The RJK5012DPE-00#J3 body diode exhibits soft recovery behavior, reducing voltage ringing during commutation.
What is the gate threshold voltage range for the RJK5012DPE-00#J3, and how does it affect drive design?
The RJK5012DPE-00#J3 has a gate-to-source cutoff voltage (VGS(off)) range of 3.0 V to 4.5 V at ID = 1 mA. This means the device begins conducting significantly above ~3.5 V and achieves full enhancement near 10 V. Drive circuits must supply ≥10 V to ensure minimal RDS(on); using only 5 V risks high conduction loss. The RJK5012DPE-00#J3 gate is not 5 V logic-compatible without level-shifting.
Can the RJK5012DPE-00#J3 be used in avalanche mode, and what is its rated energy?
Yes, the RJK5012DPE-00#J3 is rated for single-pulse avalanche operation with IAP = 4 A and EAR = 0.88 mJ (at Tch ≤ 150 °C, Tch = 25 °C initial). This rating applies to unclamped inductive switching events - such as motor phase current interruption or transformer reset faults. Repeated avalanche operation is not recommended. The RJK5012DPE-00#J3 datasheet specifies test conditions in Note 3 on page 1.
What is the thermal resistance from channel to case (θch–c) for the RJK5012DPE-00#J3, and how should it be applied in layout?
The RJK5012DPE-00#J3 has a channel-to-case thermal impedance θch–c of 1.25 °C/W, measured at Tc = 25 °C. This value assumes direct thermal contact between the exposed drain paddle (Pins 2 & 4) and ≥10 cm² of 2 oz. copper on the PCB. Layout must use multiple thermal vias under the paddle and avoid solder mask over thermal pads. The RJK5012DPE-00#J3 thermal performance degrades if the copper area is reduced below 5 cm².
RJK5012DPE-00#J3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- SC-83
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 500 V
- Current - Continuous Drain (Id) @ 25°C:
- 12A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 620mOhm @ 6A, 10V
- Vgs(th) (Max) @ Id:
- -
- Gate Charge (Qg) (Max) @ Vgs:
- 29 nC @ 10 V
- Vgs (Max):
- ±30V
- Input Capacitance (Ciss) (Max) @ Vds:
- 1100 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 100W (Tc)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LDPAK
RJK5012DPE-00#J3 FAQ
1.How can I place an order for RJK5012DPE-00#J3 through Aetrix?
Please submit a Request for Quotation (RFQ) for RJK5012DPE-00#J3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RJK5012DPE-00#J3 reliable?
The price and inventory of RJK5012DPE-00#J3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RJK5012DPE-00#J3 is usually 5 days.
3.What payment methods are accepted for RJK5012DPE-00#J3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RJK5012DPE-00#J3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RJK5012DPE-00#J3?
RJK5012DPE-00#J3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RJK5012DPE-00#J3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RJK5012DPE-00#J3?
For technical support, including RJK5012DPE-00#J3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RJK5012DPE-00#J3 requirements.
6.How does Aetrix verify that RJK5012DPE-00#J3 is sourced from the original manufacturer or authorized distributors?
All RJK5012DPE-00#J3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RJK5012DPE-00#J3 meets industry standards.
7.What is the process for return or replacement of RJK5012DPE-00#J3?
All RJK5012DPE-00#J3 units undergo pre-shipment inspection (PSI). If there is an issue with RJK5012DPE-00#J3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RJK5012DPE-00#J3 part is unused and in its original packaging.
Return procedure for RJK5012DPE-00#J3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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