STMicroelectronics SCT055TO65G3

Overview

SCT055TO65G3 from STMicroelectronics is a silicon carbide (SiC) N-channel power MOSFET rated for 650 V drain-source voltage, 58 mΩ typical R_DS(on) at 18 V_GS and 15 A, and 30 A continuous drain current at T_C = 25 °C and 100 °C. It features an integrated robust intrinsic body diode, low switching energy (E_on = 42 µJ, E_off = 35.6 µJ), and TO-LL package with source-sensing pin - deployed in high-frequency, high-efficiency PFC stages and LLC resonant converters.

For engineers reviewing the SCT055TO65G3 datasheet, SCT055TO65G3 pinout, SCT055TO65G3 application, or SCT055TO65G3 equivalent, key selection criteria include its 13 ns reverse recovery time, 75 mΩ R_DS(on) at 175 °C, 687 pF C_iss, and thermal resistance of 0.64 °C/W (junction-to-case), critical for thermally constrained SiC-based SMPS designs.

Technical Context

This device implements ST's third-generation SiC MOSFET process, delivering stable R_DS(on) across -55 to 175 °C (normalized R_DS(on) ≈ 1.0 at 25 °C, ≈ 1.8 at 175 °C) and gate threshold voltage (V_GS(th)) shift from 3.0 V at 25 °C to ~2.2 V at 175 °C. Its low Crss (11 pF) and fast switching (t_d(off) = 19.4 ns, t_f = 13.6 ns) enable hard-switched operation up to 500 kHz without excessive losses.

The TO-LL package integrates a dedicated driver source (pin 2) separate from power source (pins 3–8), enabling Kelvin-source sensing to eliminate source inductance impact on gate drive loop stability and switching loss accuracy. The intrinsic SiC body diode supports ZVS/ZCS topologies with 2.75 V forward drop at 15 A and negligible minority-carrier tail current.

Key Specifications

Pinout & Package

The SCT055TO65G3 uses a TO-LL surface-mount package with exposed drain tab (DRAIN), single gate pin (G1), driver source pin (S2), and six parallel power source terminals (S3–S8). The package measures 10.43 mm × 9.90 mm × 11.73 mm (typ.) and is optimized for high-current, low-inductance PCB layouts with thermal pad soldering.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage SiC MOSFET applications.

Compared with C3M0065065K and IXFH40N65X2, the SCT055TO65G3 delivers superior thermal performance (0.64 °C/W vs. ≥1.0 °C/W), lower switching energy, and built-in Kelvin source - making it optimal for compact, high-density, high-frequency SMPS where layout-induced gate instability must be eliminated.

Availability

SCT055TO65G3 is available at Aetrix Electronics and suitable for server power supply units, industrial motor drives, renewable energy inverters, and onboard EV chargers requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SCT055TO65G3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.

The SCT055TO65G3 belongs to ST's STPOWER SiC MOSFET product line, engineered specifically for high-efficiency, high-power-density power conversion systems operating above 100 kHz - targeting datacenter PSUs, solar inverters, and EV charging infrastructure.

FAQ

What is the maximum gate-source voltage rating for safe operation?

The absolute maximum V_GS is -10 V to +22 V, but the recommended operating range is -5 V to +18 V. Transient excursions up to -11 V/+25 V are allowed for ≤1 μs pulses and ≤10 hours cumulative over lifetime. Exceeding +18 V continuously risks gate oxide degradation, especially at elevated junction temperatures.

How does the source-sensing pin (S2) improve system performance?

The S2 pin provides a dedicated Kelvin return path for the gate driver, isolating gate loop current from high di/dt power source current. This eliminates voltage drop across source inductance that would otherwise distort effective V_GS, preventing false turn-off during hard switching and reducing E_on uncertainty by up to 18% in 500 kHz PFC designs.

Can SCT055TO65G3 replace silicon MOSFETs in existing designs without layout changes?

No - the TO-LL package and 8-pin configuration (including dedicated S2) require PCB footprint and gate driver routing modifications. Direct replacement is not feasible; redesign must accommodate Kelvin-source routing, thermal pad soldering, and reduced gate loop inductance to realize full performance benefits.

What is the safe operating area (SOA) limitation at 100 °C case temperature?

At T_C = 100 °C, the SOA is limited by bonding wire current capacity (30 A continuous) and R_DS(on)-based thermal limits. For pulse widths ≤10 µs, the device supports up to 147 A (I_DM); for 1 ms pulses, max ID drops to ~65 A due to junction temperature rise constraints, as shown in Figure 1 of DS14826.