STMicroelectronics SCT070W120G3-4

Overview

SCT070W120G3-4 from STMicroelectronics is a silicon carbide (SiC) Power MOSFET rated for 1200 V drain-source voltage, 63 mΩ typical R_DS(on) at V_GS = 18 V and T_J = 25 °C, and 30 A continuous drain current at T_C = 25 °C. It features a source-sensing pin (Kelvin source), operates up to 200 °C junction temperature, and delivers ultra-low switching energy (E_on = 237 µJ, E_off = 67 µJ) in high-frequency DC-DC converters for solar inverters.

For engineers reviewing the SCT070W120G3-4 datasheet, SCT070W120G3-4 pinout, SCT070W120G3-4 application, or SCT070W120G3-4 equivalent, key selection criteria include its 1200 V blocking capability, Kelvin-source layout for gate drive stability, low C_iss/C_oss ratio (900 pF / 40 pF), robust intrinsic SiC body diode (t_rr = 15 ns), and HiP247-4 package thermal resistance of 0.74 °C/W.

Technical Context

This 3rd-generation SiC MOSFET uses ST's trench-gate process to achieve stable R_DS(on) across -55 °C to 200 °C (normalized R_DS(on) ≤ 2.5× at T_J = 200 °C) and low gate charge (Q_g = 41 nC, Q_gd = 17 nC). Its reverse recovery performance (Q_rr = 75 nC, I_RRM = 8.4 A) enables zero-voltage switching in hard-switched topologies without external anti-parallel diodes.

The HiP247-4 package integrates a dedicated driver source terminal (Pin 3) electrically isolated from power source (Pin 2), minimizing gate loop inductance and suppressing oscillation during dV/dt > 50 V/ns transients. This architecture supports gate drive voltages up to 22 V with ±100 nA leakage and 1.8–4.2 V threshold voltage range.

Key Specifications

Pinout & Package

Package: HiP247-4 - 4-terminal TO-style power package with isolated Kelvin source, optimized for low-inductance gate loops and thermal resistance of 0.74 °C/W (junction-to-case).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage SiC MOSFET applications.

Compared with C3M0065120K and UF3SC120016K4S, SCT070W120G3-4 uniquely combines Kelvin-source reliability, industry-leading 0.74 °C/W thermal resistance, and verified 200 °C operation-making it optimal for mission-critical 15–50 kW industrial converters demanding long-term thermal stability.

Availability

SCT070W120G3-4 is available at Aetrix Electronics and suitable for photovoltaic string inverters, EV fast-charging front-end rectifiers, and industrial UPS DC-DC isolation stages requiring stable component supply, long-lifecycle support, and traceable sourcing.

Supply support for SCT070W120G3-4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.

This device belongs to ST's STPOWER SiC portfolio, engineered specifically for high-efficiency, high-reliability power conversion in renewable energy, EV infrastructure, and industrial motor drives-where voltage scalability, thermal resilience, and switching fidelity are non-negotiable.

FAQ

What gate drive voltage range is recommended for reliable operation?

The SCT070W120G3-4 specifies a recommended operating gate-source voltage of −5 V to +18 V, with absolute maximum ratings of −11 V to +25 V for transient conditions (t_p < 1 µs). A −5 V turn-off bias is required to ensure robust noise immunity in high-dV/dt environments, while +15 V to +18 V provides optimal R_DS(on) and switching speed. Gate drive circuits must limit peak current to <2 A to avoid bond wire damage during fast transitions.

How does the Kelvin source (Pin 3) differ from the power source (Pin 2) in layout?

Pin 3 (Driver Source) is an isolated low-current return path exclusively for the gate driver circuit, while Pin 2 (Power Source) carries full load current (up to 30 A). Layout requires separate PCB traces: Pin 3 must connect directly to the gate driver IC's source pin with minimal loop area (<2 mm²), while Pin 2 routes to the main power ground plane. Mixing these paths introduces gate oscillation and false turn-on due to source inductance voltage drop.

Can this MOSFET replace silicon IGBTs in existing 1200 V designs without board changes?

No-direct replacement is not feasible due to fundamental differences in gate drive requirements, switching behavior, and layout. Unlike IGBTs, this SiC MOSFET demands negative turn-off bias (−5 V), tighter gate loop control, Kelvin-source routing, and reduced snubber sizing. Successful migration requires gate driver redesign, PCB layout revision to isolate driver/power source paths, and recalculation of EMI filters based on faster switching edges.

What is the safe operating area (SOA) limitation at 100 °C case temperature?

At T_C = 100 °C, the continuous drain current is derated to 29 A (per Table 1), and the SOA is bounded by R_DS(on) conduction limit and single-pulse avalanche energy. For pulse widths >100 µs, maximum V_DS drops to ~650 V at 29 A; for 10 µs pulses, it supports 1200 V at ≤15 A. The SOA curve (Figure 1) confirms no second-breakdown risk, but thermal runaway must be prevented via proper heatsinking to maintain T_J ≤ 200 °C.