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Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Vishay Siliconix SI8489EDB-T2-E1

Name: SI8489EDB-T2-E1
Brand: Vishay Siliconix
SKU: SI8489EDB-T2-E1
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI8489EDB-T2-E1

Manufacturer:: Vishay Siliconix

Category:: FETs, MOSFETs

Package:: 4-UFBGA

Datasheet:: SI8489EDB-T2-E1.pdf

Description:: MOSFET P-CH 20V 4MICROFOOT

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Product details

Overview

SI8489EDB-T2-E1 from Vishay Siliconix is a P-channel enhancement-mode MOSFET designed for high-efficiency load switching in space-constrained portable electronics. It features -20 V V_DS, 0.044 Ω R_DS(on) at V_GS = -10 V, -5.4 A continuous drain current (T_A = 25 °C), and MICRO FOOT® 1 mm × 1 mm package with 0.5 mm pitch. It serves as a compact, low-profile battery disconnect switch in smartphones and tablet PCs.

For engineers reviewing the SI8489EDB-T2-E1 datasheet, SI8489EDB-T2-E1 pinout, SI8489EDB-T2-E1 application, or SI8489EDB-T2-E1 equivalent, key selection criteria include its -2.5 V gate threshold enabling 3.3 V logic-level drive, 2500 V HBM ESD rating for robust handling, thermal resistance of 55 °C/W (typical) on full-copper FR4, and verified performance in battery management and charger switch circuits.

Technical Context

This device operates as a single P-channel power switch with trench-based silicon architecture optimized for low R_DS(on) and fast switching. Its gate threshold voltage range (-0.5 V to -1.2 V) ensures reliable turn-on with standard I/O voltages, while the body diode exhibits V_SD = -0.8 V (typ.) at -1.5 A and t_rr = 25 ns (typ.), supporting synchronous rectification in bidirectional current paths.

The MICRO FOOT® package uses four solder bumps (Sn/Ag/Cu) on a 0.5 mm pitch grid, with backside Ti/Ni/Ag metallization and laser-marked die identification. Thermal performance is characterized under two PCB copper conditions: full-copper (R_thJA = 55 °C/W typ.) and minimum-copper (R_thJA = 125 °C/W typ.), enabling accurate power derating across board designs.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	-20 V - Maximum reverse-blocking capability for Li-ion battery systems (up to 3S).
R_DS(on) @ V_GS = -4.5 V	0.054 Ω max - Enables <100 mW conduction loss at 4.9 A, critical for thermal budget in thin devices.
I_D (continuous)	-4.9 A @ V_GS = -4.5 V, T_A = 25 °C - Sufficient for USB-C PD charger switches and battery protection FETs.
Q_g (total gate charge)	8.6 nC typ. @ V_GS = -4.5 V - Supports efficient 1–2 MHz switching in active load control without excessive driver loss.
V_GS(th)	-0.5 to -1.2 V - Ensures full enhancement with 1.8 V or 3.3 V GPIO, eliminating need for level shifters.
t_rr (body diode)	25 ns typ. - Reduces reverse recovery loss during forced commutation in buck-boost battery chargers.
ESD (HBM)	2500 V - Meets IEC 61000-4-2 Level 3 for direct handling in assembly lines without special precautions.

Pinout & Package

MICRO FOOT® 1 mm × 1 mm, 4-bump land-grid array (LGA) package with bottom-side terminations. Bump pitch is 0.5 mm; bump height is 0.286 mm; solderable surface diameter (b1) is 0.250 mm. Pin 1 location marked by laser on die backside.

Pin/Terminal	Circuit Role	Design Meaning
1 (S)	Source	Common return path for load current; electrically tied to exposed die backside for thermal conduction.
2 (S)	Source	Second source terminal - parallel connection reduces source inductance and improves current sharing.
3 (D)	Drain	Main high-side current path; connects to battery cathode or system rail; requires thermal pad routing.
4 (G)	Gate	Control input; sensitive to ESD; requires low-impedance drive due to 14 Ω intrinsic gate resistance.

Key Features

Feature	Design Value
TrenchFET® architecture	Delivers 0.044 Ω R_DS(on) in 1 mm² footprint - enables higher current density than planar P-MOSFETs of same size.
0.548 mm max profile	Reduces Z-height in stacked PCB assemblies - critical for ultra-thin tablets and foldable displays.
Body diode with 25 ns t_rr	Minimizes energy loss during reverse conduction in battery charging ICs with integrated buck-boost topology.
Full-copper R_thJA = 55 °C/W	Allows 1.1 W continuous dissipation at 70 °C ambient - supports sustained 4.3 A operation without heatsink.
Lead (Pb)-free and halogen-free	Complies with RoHS Directive 2011/65/EU and JEDEC J-STD-020 reflow profile - suitable for lead-free manufacturing.

Applications

Battery Protection Circuit	USB-C Charger Switch
Use Scenario: Isolates Li-ion cell from system during overvoltage, overtemperature, or short-circuit events. IC Role / Device Role / Timing Role: High-side P-channel switch controlled by battery management IC (e.g., BQ series) to interrupt discharge path. Use Value: 0.054 Ω R_DS(on) limits voltage drop to <270 mV at 5 A, preserving protection accuracy and minimizing self-heating.	Use Scenario: Enables/disables power delivery from USB-C PD source to device battery during charging negotiation. IC Role / Device Role / Timing Role: Load switch placed between PD controller and battery charger IC to enforce policy-based power routing. Use Value: 8.6 nC Q_g allows clean 10 μs turn-on/off transitions, preventing bus glitches during PD contract renegotiation.
Smartphone Power Path	Tablet PC System Rail Control
Use Scenario: Manages dual-input power path (adapter + battery) to prioritize external supply while charging battery. IC Role / Device Role / Timing Role: Reverse-blocking P-MOSFET in ideal diode configuration, driven by dedicated power-path controller. Use Value: -20 V V_DS withstands adapter transients up to ±15 V; -0.8 V V_SD minimizes forward drop during battery backup mode.	Use Scenario: Controls main SoC rail (e.g., 3.3 V or 1.8 V) during sleep/wake transitions to reduce standby leakage. IC Role / Device Role / Timing Role: Low-R_DS(on) enable switch in PMIC output stage, synchronized with processor power states. Use Value: 0.044 Ω R_DS(on) at -10 V gate drive ensures <220 mW loss at 7 A peak SoC current, maintaining thermal margin.

Battery Protection Circuit

USB-C Charger Switch

Use Scenario: Isolates Li-ion cell from system during overvoltage, overtemperature, or short-circuit events.

IC Role / Device Role / Timing Role: High-side P-channel switch controlled by battery management IC (e.g., BQ series) to interrupt discharge path.

Use Value: 0.054 Ω R_DS(on) limits voltage drop to <270 mV at 5 A, preserving protection accuracy and minimizing self-heating.

Use Scenario: Enables/disables power delivery from USB-C PD source to device battery during charging negotiation.

IC Role / Device Role / Timing Role: Load switch placed between PD controller and battery charger IC to enforce policy-based power routing.

Use Value: 8.6 nC Q_g allows clean 10 μs turn-on/off transitions, preventing bus glitches during PD contract renegotiation.

Smartphone Power Path

Tablet PC System Rail Control

Use Scenario: Manages dual-input power path (adapter + battery) to prioritize external supply while charging battery.

IC Role / Device Role / Timing Role: Reverse-blocking P-MOSFET in ideal diode configuration, driven by dedicated power-path controller.

Use Value: -20 V V_DS withstands adapter transients up to ±15 V; -0.8 V V_SD minimizes forward drop during battery backup mode.

Use Scenario: Controls main SoC rail (e.g., 3.3 V or 1.8 V) during sleep/wake transitions to reduce standby leakage.

IC Role / Device Role / Timing Role: Low-R_DS(on) enable switch in PMIC output stage, synchronized with processor power states.

Use Value: 0.044 Ω R_DS(on) at -10 V gate drive ensures <220 mW loss at 7 A peak SoC current, maintaining thermal margin.

Equivalent & Alternatives

The following parts are listed as comparable options for similar P-channel load switch applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si8487EDB-T2-E1	Same package and pinout; lower R_DS(on) (0.032 Ω @ -10 V) but higher Q_g (12.5 nC); V_GS(th) range -0.7 to -1.5 V.	Better conduction efficiency at high currents; slower switching due to higher gate charge - less suitable for dynamic load control.	Select when minimizing steady-state loss dominates over switching speed, e.g., always-on battery disconnect.
DMN2011UFD-7	1.6 mm × 1.6 mm TSOP-6 package; R_DS(on) = 0.042 Ω @ -4.5 V; higher profile (0.95 mm); no specified HBM rating.	Larger footprint and height limit use in ultra-thin devices; lacks documented ESD robustness for direct handling.	Choose only if PCB layout permits larger package and ESD sensitivity is mitigated by downstream protection.

Compared with SI8489EDB-T2-E1, Si8487EDB-T2-E1 offers lower conduction loss but sacrifices switching speed, while DMN2011UFD-7 trades miniaturization for mechanical robustness and relaxed layout constraints - making SI8489EDB-T2-E1 optimal for height- and ESD-sensitive portable designs.

Availability

SI8489EDB-T2-E1 is available at Aetrix Electronics and suitable for smartphone power management, tablet PC battery charging, and portable medical device load switching requiring stable component supply and long-term lifecycle support.

Supply support for SI8489EDB-T2-E1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics for power, signal, and sensing applications.

The Si8489EDB product line delivers ultra-compact, high-current P-channel MOSFETs targeting space-constrained battery-powered systems where thermal performance and logic-level drive are critical design requirements.

FAQ

What is the maximum continuous drain current for SI8489EDB-T2-E1 at 70 °C ambient temperature?

The SI8489EDB-T2-E1 supports -4.3 A continuous drain current at T_A = 70 °C with full-copper PCB mounting (per datasheet note a). This rating assumes steady-state thermal equilibrium and accounts for junction temperature limiting to 150 °C. Derating follows linear interpolation between 25 °C (-5.4 A) and 70 °C (-4.3 A), and must be validated against actual board layout and airflow. The SI8489EDB-T2-E1 datasheet specifies this value in the Absolute Maximum Ratings table on page 1.

Does SI8489EDB-T2-E1 require a gate resistor for safe operation?

The SI8489EDB-T2-E1 does not mandate an external gate resistor for basic on/off switching, but a 1–10 Ω resistor is recommended to dampen ringing caused by its 14 Ω intrinsic gate resistance and PCB trace inductance. Without damping, fast edges may induce oscillation exceeding ±12 V V_GS rating, risking gate oxide damage. For PWM applications above 500 kHz, a 5 Ω resistor optimizes SI8489EDB-T2-E1 switching behavior while maintaining EMI compliance. Refer to Figure 12 in the datasheet for gate drive test setup.

Can SI8489EDB-T2-E1 be used in bidirectional current applications?

Yes, SI8489EDB-T2-E1 supports bidirectional current flow via its intrinsic body diode, which has V_SD = -0.8 V (typ.) at -1.5 A and t_rr = 25 ns (typ.). However, it is not rated for continuous reverse conduction beyond -1.5 A (T_A = 25 °C) or -0.65 A (minimum copper). For sustained reverse current, external Schottky clamping or synchronous FET control is required. The SI8489EDB-T2-E1 body diode characteristics are fully specified in the "Source-Drain Diode Characteristics" section on page 3.

What is the thermal resistance from junction to ambient for SI8489EDB-T2-E1 on a minimal-copper PCB?

On a 1" × 1" FR4 board with minimum copper, the SI8489EDB-T2-E1 exhibits a maximum junction-to-ambient thermal resistance (R_thJA) of 160 °C/W, with a typical value of 125 °C/W (per datasheet page 2, Thermal Resistance Ratings table). This condition reflects worst-case board layout with limited thermal vias and copper pour, requiring strict power derating: at 25 °C ambient, maximum continuous power dissipation drops to 0.5 W. The SI8489EDB-T2-E1 thermal performance curves on page 5 confirm this dependency.

Is SI8489EDB-T2-E1 compatible with standard lead-free reflow profiles?

Yes, SI8489EDB-T2-E1 is qualified for IPC/JEDEC J-STD-020D reflow, with peak temperature tolerance up to 260 °C for both IR and convection processes (page 1, Package Reflow Conditions). The MICRO FOOT® package uses Sn/Ag/Cu bumps and Ti/Ni/Ag backside metallization, ensuring reliable solder joint formation without voiding or delamination. No pre-bake or special atmosphere is required. The SI8489EDB-T2-E1 packaging documentation (Doc #69370) validates compatibility with industry-standard lead-free manufacturing.

SI8489EDB-T2-E1 Specifications

Product attributes: Attribute value

Manufacturer:: Vishay Siliconix

Series:: TrenchFET®

Package/Case:: 4-UFBGA

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: P-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 20 V

Current - Continuous Drain (Id) @ 25°C:: 3.06A (Ta)

Drive Voltage (Max Rds On, Min Rds On):: 2.5V, 10V

Rds On (Max) @ Id, Vgs:: 44mOhm @ 1.5A, 10V

Vgs(th) (Max) @ Id:: 1.2V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 27 nC @ 10 V

Vgs (Max):: ±12V

Input Capacitance (Ciss) (Max) @ Vds:: 765 pF @ 10 V

FET Feature:: -

Power Dissipation (Max):: 780mW (Ta), 1.8W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 4-Microfoot

SI8489EDB-T2-E1 FAQ

1.How can I place an order for SI8489EDB-T2-E1 through Aetrix?

Please submit a Request for Quotation (RFQ) for SI8489EDB-T2-E1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI8489EDB-T2-E1 reliable?

The price and inventory of SI8489EDB-T2-E1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8489EDB-T2-E1 is usually 5 days.

3.What payment methods are accepted for SI8489EDB-T2-E1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8489EDB-T2-E1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI8489EDB-T2-E1?

SI8489EDB-T2-E1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI8489EDB-T2-E1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI8489EDB-T2-E1?

For technical support, including SI8489EDB-T2-E1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8489EDB-T2-E1 requirements.

6.How does Aetrix verify that SI8489EDB-T2-E1 is sourced from the original manufacturer or authorized distributors?

All SI8489EDB-T2-E1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8489EDB-T2-E1 meets industry standards.

7.What is the process for return or replacement of SI8489EDB-T2-E1?

All SI8489EDB-T2-E1 units undergo pre-shipment inspection (PSI). If there is an issue with SI8489EDB-T2-E1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI8489EDB-T2-E1 part is unused and in its original packaging.

Return procedure for SI8489EDB-T2-E1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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