Vishay Siliconix SIC780CD-T1-GE3
- Part No.:
- SIC780CD-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- Full Half-Bridge (H Bridge) Drivers
- Package:
- PowerPAK® MLP66-40
- Datasheet:
-
SIC780CD-T1-GE3.pdf
- Description:
- IC HALF BRIDGE DRIVER 50A PPAK
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SIC780CD-T1-GE3 from Vishay Siliconix is a 5 V logic-compatible integrated DrMOS power stage for synchronous buck converters, featuring integrated high- and low-side TrenchFET Gen III MOSFETs, adaptive dead-time control, and thermal warning (THDN) output. It delivers >50 A continuous current per phase with 93 % peak efficiency at 12 V input and supports up to 1 MHz switching frequency in CPU/GPU VRD applications.
For engineers reviewing the SIC780CD-T1-GE3 datasheet, SIC780CD-T1-GE3 pinout, SIC780CD-T1-GE3 application, or SIC780CD-T1-GE3 equivalent, key selection criteria include 5 V PWM logic compatibility, Tri-state PWM support, SMOD-enabled light-load efficiency, <20 ns PWM propagation delay, and compliance with Intel DrMOS 4.0 specification.
Technical Context
The SIC780CD-T1-GE3 integrates a gate driver IC with adaptive shoot-through protection that monitors GH/GL gate voltages to enforce ≥1 V off-threshold before enabling the complementary FET, dynamically adjusting dead time across load and temperature. Its bootstrap circuit includes an integrated Schottky diode, requiring only an external capacitor between BOOT and PHASE pins.
It implements dual-level thermal monitoring via open-drain THDN flag (set at 160 °C, cleared at 135 °C) and supports system-level disable via active-low DSBL# pin, which forces both MOSFETs off and minimizes standby current. The device uses separate VCIN (5 V logic bias) and VDRV (5 V gate drive supply) rails, recommended to be decoupled via a series resistor to suppress noise coupling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Continuous Current | >50 A per phase - enables single-phase designs for high-current CPU/GPU VRDs without parallel stages |
| Peak Efficiency | 93 % at 12 VIN/1.2 VOUT - reduces thermal load and improves POL module power density |
| Switching Frequency | Up to 1 MHz - supports compact filter design with ≤0.33 μH output inductance |
| PWM Logic Level | 5 V compatible (Vth_r = 3.4–4.2 V, Vth_f = 0.7–1.2 V) - interoperable with standard VR controllers without level shifting |
| PWM Propagation Delay | <20 ns - ensures tight timing alignment in multi-phase interleaved systems |
| Thermal Warning Threshold | 160 °C set / 135 °C clear (25 °C hysteresis) - provides early overtemperature alert without halting operation |
| Input Voltage Range | VIN: 4.5–18 V DC - optimized for 12 V intermediate bus in server/desktop VRMs |
Pinout & Package
Package: PowerPAK® MLP66-40L (6 mm × 6 mm, 40-terminal thermally enhanced QFN with exposed thermal pad P3/VSWH).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SMOD#) | Diode emulation mode control | Active-low input enabling non-synchronous operation to reduce light-load switching losses |
| 2 (VCIN) | Logic supply input | 5 V bias rail for internal control circuitry; UVLO threshold 3.7–4.3 V rising edge |
| 3 (VDRV) | Gate driver supply input | 5 V supply for high-current gate drivers; separate from VCIN to isolate noise |
| 4 (BOOT) | High-side bootstrap node | Connects to external capacitor referenced to PHASE; integrated Schottky eliminates external diode |
| 5, 37, P1 (CGND) | Analog ground reference | Control signal return; must be externally tied to PGND with minimal inductance (<0.5 V transient delta) |
| 6 (GH) | High-side gate drive output | Drives HS MOSFET gate; features adaptive dead-time control and shoot-through protection |
| 7 (PHASE) | Switch node return for BOOT | Internally connected to VSWH; provides discharge path for HS gate via 20.2 kΩ resistor to GH |
| 8–14, P2 (VIN) | Power input (HS drain) | Connects to 12 V intermediate bus; rated -0.3 to +22 V DC absolute max |
| 15, 29–35, P3 (VSWH) | Phase node output | Switching node output to output filter; also serves as thermal pad (θJC = 2.5 °C/W) |
| 16–28 (PGND) | Power ground | High-current return for MOSFET sources; layout-critical low-inductance connection to CGND |
| 36 (GL) | Low-side gate drive output | Drives LS MOSFET gate; synchronized with GH using adaptive dead-time logic |
| 38 (THDN) | Thermal shutdown warning | Open-drain flag pulled up to VCIN; asserts at 160 °C junction, clears at 135 °C |
| 39 (DSBL#) | Global disable input | Active-low shutdown of entire driver; internal pull-down ensures safe default state |
| 40 (PWM) | PWM control input | 5 V logic interface supporting Tri-state (Hi-Z) detection with 150 ns hold-off for phase disable |
Key Features
| Feature | Design Value |
|---|---|
| Integrated TrenchFET Gen III MOSFETs | Reduces conduction and switching losses simultaneously, enabling >50 A/phase at 93 % peak efficiency |
| Adaptive dead-time control | Monitors real-time GH/GL gate voltages to dynamically adjust turn-on timing, eliminating need for fixed external dead-time circuits |
| Tri-state PWM compatibility | Detects controller Hi-Z state and disables both FETs after 150 ns hold-off, preventing negative voltage swing during phase shedding |
| SMOD logic for light-load boost | Disables low-side FET under light load to eliminate reverse conduction loss and improve efficiency below 10 % load |
| Intel DrMOS 4.0 compliance | Meets timing, thermal, and functional requirements for modern CPU/GPU voltage regulator modules including THDN flag and UVLO behavior |
Applications
| CPU Voltage Regulator Module (VRM) | GPU Power Delivery |
|---|---|
Use Scenario: Single-phase or multi-phase buck converter supplying core voltage to high-performance x86 CPUs in servers and desktops. IC Role / Device Role / Timing Role: Integrated DrMOS power stage delivering regulated 0.8–1.5 V output at >50 A per phase with sub-20 ns PWM timing fidelity. Use Value: Enables compact, high-efficiency VRMs meeting Intel DrMOS 4.0 spec while reducing BOM count by integrating gate driver, HS/LS FETs, and bootstrap diode. | Use Scenario: High-current POL stage powering discrete or integrated GPUs in gaming PCs and AI workstations. IC Role / Device Role / Timing Role: Phase-leg power stage operating up to 1 MHz with adaptive dead-time control to maintain stability under dynamic GPU load transients. Use Value: Delivers 93 % peak efficiency at 12 VIN/1.2 VOUT, minimizing heat generation in thermally constrained GPU PCB layouts. |
| Memory Subsystem VRD | DC/DC Point-of-Load Module |
Use Scenario: Multi-phase VRD supplying DDR4/DDR5 memory rails (1.2 V, 1.1 V, 1.05 V) with fast transient response. IC Role / Device Role / Timing Role: Synchronous buck power stage with Tri-state PWM support for seamless phase shedding during low-memory-bandwidth periods. Use Value: SMOD logic disables LS FET during light load, eliminating reverse conduction loss and maintaining >85 % efficiency at 1 A output. | Use Scenario: Standalone 12 V-to-1.2 V DC/DC module for FPGA, ASIC, or SoC core power in industrial embedded systems. IC Role / Device Role / Timing Role: Fully integrated power stage with thermal warning (THDN) output for system-level thermal management and fault logging. Use Value: Open-drain THDN flag (160 °C set) enables host MCU to initiate graceful shutdown before junction exceeds 150 °C absolute max rating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DrMOS power stage applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiC780ACD-T1-GE3 | 3.3 V PWM logic thresholds (Vth_r = 2.1–2.8 V), same package and pinout | Required for VR controllers with 3.3 V output logic; not interoperable with 5 V controllers without level shift | Select SiC780ACD-T1-GE3 only when paired with 3.3 V PWM controllers; SIC780CD-T1-GE3 is incompatible |
| IR35201MTRPBF | Standalone DrMOS controller (no integrated FETs); requires external HS/LS MOSFETs and gate driver components | Offers greater flexibility in MOSFET selection and thermal layout but increases BOM count and design complexity | Choose IR35201MTRPBF only when discrete FET optimization or custom thermal partitioning is required; SIC780CD-T1-GE3 offers lower system-level cost and footprint |
Compared with SiC780ACD-T1-GE3, SIC780CD-T1-GE3 provides higher noise margin for 5 V logic interfaces and eliminates level-shifter components; versus IR35201MTRPBF, it reduces component count by integrating FETs and driver while maintaining Intel DrMOS 4.0 compliance and thermal monitoring.
Availability
SIC780CD-T1-GE3 is available at Aetrix Electronics and suitable for CPU VRMs, GPU power delivery, and memory subsystem VRDs requiring stable component supply, long-term lifecycle support, and traceable sourcing for high-volume production.
Supply support for SIC780CD-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-efficiency power solutions with emphasis on MOSFETs, diodes, and integrated power stages.
The SiC780 family is designed specifically for high-current, high-frequency synchronous buck conversion in computing VRMs, targeting compliance with Intel DrMOS specifications and delivering >50 A/phase in a thermally optimized 6 mm × 6 mm MLP package.
FAQ
What is the PWM logic voltage compatibility of the SIC780CD-T1-GE3?
The SIC780CD-T1-GE3 is designed for 5 V PWM logic interfaces, with rising threshold of 3.4–4.2 V and falling threshold of 0.7–1.2 V. This ensures robust noise immunity and direct compatibility with standard VR controllers without external level shifting. The SIC780CD-T1-GE3 does not support 3.3 V logic; for that, the pin-compatible SiC780ACD-T1-GE3 variant must be used instead.
How does the SIC780CD-T1-GE3 implement thermal protection?
The SIC780CD-T1-GE3 provides thermal warning-not shutdown-via the open-drain THDN pin, which asserts at 160 °C junction temperature and clears at 135 °C (25 °C hysteresis). It does not halt operation upon assertion; instead, it signals the host system to initiate corrective action. The SIC780CD-T1-GE3 also includes VCIN UVLO (3.7–4.3 V) and internal 20.2 kΩ GH-to-PHASE discharge resistor for safe gate discharge during power loss.
What is the purpose of the SMOD# pin on the SIC780CD-T1-GE3?
The SMOD# (diode emulation mode) pin on the SIC780CD-T1-GE3 is an active-low input that disables the low-side MOSFET during light-load conditions, converting the synchronous buck into a non-synchronous topology. This eliminates reverse conduction loss in the LS FET, improving light-load efficiency. When left unconnected, an internal pull-up holds SMOD# high, disabling the function. The SIC780CD-T1-GE3 relies on external controller detection of zero-crossing current to activate SMOD#.
Does the SIC780CD-T1-GE3 require an external bootstrap diode?
No, the SIC780CD-T1-GE3 integrates a bootstrap Schottky diode internally, so only an external bootstrap capacitor connected between BOOT and PHASE pins is required. This eliminates the need for an external diode, simplifying layout and reducing component count. The integrated diode has a forward voltage of ≤0.4 V at 2 mA, ensuring efficient charging of the bootstrap capacitor during each switching cycle.
What is the significance of Tri-state PWM support in the SIC780CD-T1-GE3?
Tri-state PWM support allows the SIC780CD-T1-GE3 to detect when the controller's PWM output enters high-impedance (Hi-Z) state-common during phase shedding-and disable both high- and low-side FETs after a 150 ns hold-off period. This prevents negative voltage swing caused by inductor ringing and eliminates the need for external Schottky clamps. The SIC780CD-T1-GE3 uses hysteresis around the tri-state voltage (2.3 V typical) to avoid false triggering.
SIC780CD-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Package/Case:
- PowerPAK® MLP66-40
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Half Bridge
- Applications:
- Synchronous Buck Converters
- Interface:
- PWM
- Load Type:
- Inductive
- Technology:
- DrMOS
- Rds On (Typ):
- -
- Current - Output / Channel:
- 50A
- Current - Peak Output:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Load:
- 4.5V ~ 18V
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Features:
- Bootstrap Circuit, Diode Emulation, Status Flag
- Fault Protection:
- Over Temperature, Shoot-Through, UVLO
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® MLP66-40
SIC780CD-T1-GE3 FAQ
1.How can I place an order for SIC780CD-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIC780CD-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIC780CD-T1-GE3 reliable?
The price and inventory of SIC780CD-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIC780CD-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIC780CD-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIC780CD-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIC780CD-T1-GE3?
SIC780CD-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIC780CD-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIC780CD-T1-GE3?
For technical support, including SIC780CD-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIC780CD-T1-GE3 requirements.
6.How does Aetrix verify that SIC780CD-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIC780CD-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIC780CD-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIC780CD-T1-GE3?
All SIC780CD-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIC780CD-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIC780CD-T1-GE3 part is unused and in its original packaging.
Return procedure for SIC780CD-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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