Vishay Siliconix SIDR104ADP-T1-RE3
- Part No.:
- SIDR104ADP-T1-RE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIDR104ADP-T1-RE3.pdf
- Description:
- MOSFET N-CH 100V 18.8A/81A PPAK
- Quantity:
- Payment:

- Shipping:

Inventory:5,920
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Product details
Overview
SIDR104ADP-T1-RE3 from Vishay Siliconix is an N-channel 100 V, 81 A (TC = 25 °C) TrenchFET® Gen IV power MOSFET in PowerPAK® SO-8DC package, featuring RDS(on) = 6.1 mΩ @ VGS = 10 V and Qg = 35.1 nC (typ.), optimized for high-efficiency synchronous rectification and primary-side switching in DC/DC converters.
For engineers reviewing the SIDR104ADP-T1-RE3 datasheet, SIDR104ADP-T1-RE3 pinout, SIDR104ADP-T1-RE3 application, or SIDR104ADP-T1-RE3 equivalent, this device delivers low RDS(on) × Qoss FOM, 100% Rg and UIS tested reliability, and thermal performance validated to 150 °C junction temperature - critical for compact, high-power-density power supply designs.
Technical Context
This MOSFET employs TrenchFET® Gen IV silicon architecture with optimized charge distribution to minimize both RDS(on) × Qg and RDS(on) × Qoss figures of merit. Its gate threshold voltage (2–4 V) and low gate resistance (0.3–1.5 Ω) support fast, robust switching under PWM control at frequencies up to several hundred kHz.
The PowerPAK® SO-8DC package features dual-sided cooling: exposed drain copper on the bottom for enhanced thermal conduction to PCB, and source terminals accessible on top for low-inductance gate drive routing. Body diode trr = 45 ns (typ.) and Qrr = 65 nC (typ.) enable efficient hard-switched and synchronous rectifier operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - supports primary-side switching in 48 V input DC/DC and offline auxiliary supplies up to 85 VAC peak. |
| RDS(on) max @ 10 V | 6.1 mΩ - enables ≤ 9.4 W conduction loss at 81 A, critical for thermally constrained board layouts. |
| Qg typ @ 7.5 V | 35.1 nC - reduces gate drive power and enables efficient operation with standard 1-A peak gate drivers. |
| ID continuous @ TC = 25 °C | 81 A - supports high-current output stages without paralleling, simplifying layout and reducing component count. |
| RthJC (drain) | 1.25 °C/W max - allows direct thermal path from die to heatsink or copper plane, enabling > 60 W dissipation with modest heatsinking. |
| VGS(th) | 2–4 V - ensures reliable turn-on with standard 3.3 V or 5 V logic-level controllers and avoids false triggering. |
| trr & Qrr | 45 ns / 65 nC - minimizes body diode switching loss and voltage overshoot during freewheeling in synchronous buck topologies. |
Pinout & Package
Package: PowerPAK® SO-8DC - leadless, double-cooled surface-mount package with exposed drain pad (bottom) and top-side source/gate terminals. Dimensions: 6.15 mm × 5.15 mm × 0.56 mm (L × W × H). Designed for high-current, low-thermal-resistance PCB mounting with solderable copper pads on both sides.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 7, 8 | Drain (D) | Internally connected to exposed bottom copper pad - primary thermal and current path to PCB ground plane or heatsink. |
| 4, 5 | Source (S) | Top-side terminals; low-inductance connection point for return path and gate drive reference; electrically tied to drain via internal bond wires. |
| 6 | Gate (G) | Single top-side control terminal; requires <1.5 Ω series gate resistor to damp ringing due to low Rg (0.3–1.5 Ω). |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen IV silicon | Delivers industry-leading RDS(on) × Qoss FOM (≤ 360 Ω·nC), directly reducing switching loss in high-frequency DC/DC converters. |
| 100 % Rg and UIS tested | Ensures gate robustness against transient overvoltage and ruggedness under unclamped inductive switching stress - critical for motor drive and load switch reliability. |
| PowerPAK® SO-8DC dual cooling | Enables simultaneous top-side gate access and bottom-side thermal conduction, achieving RthJC = 1.25 °C/W (drain) without external heatsink. |
| Low VSD body diode | VSD = 0.74 V (typ.) at 5 A improves efficiency in synchronous rectifier mode versus Schottky alternatives with higher forward drop. |
| −55 to +150 °C operating range | Validated for industrial and automotive under-hood applications where ambient temperatures exceed 105 °C and thermal cycling is severe. |
Applications
| Synchronous Rectification | Primary-Side Switch |
|---|---|
|
Use Scenario: Secondary-side switch in isolated DC/DC converters (e.g., LLC, phase-shifted full-bridge) operating at 100–500 kHz. IC Role / Device Role: Low-loss replacement for Schottky diodes, actively controlled by transformer-coupled or isolated gate driver. Use Value: Reduces conduction loss by >40% vs. 40 V Schottky at 20 A, enabling >95% converter efficiency at full load. |
Use Scenario: High-current main switch in non-isolated buck converters for server VRMs or telecom POL modules. IC Role / Device Role: Power stage transistor handling up to 81 A continuous drain current with minimal thermal derating. Use Value: Eliminates need for paralleled MOSFETs; single-device solution reduces layout area by 35% and gate drive complexity. |
| DC/DC Converter Output Stage | Battery Load Switch |
|
Use Scenario: High-efficiency 12 V → 1 V/100 A point-of-load regulator in AI accelerator cards. IC Role / Device Role: Bottom-side FET in synchronous buck topology, switched at 600 kHz with 3.3 V gate drive. Use Value: Achieves <0.5 mΩ effective RDS(on) × duty cycle loss contribution, limiting junction temperature rise to <30 °C above ambient. |
Use Scenario: Reverse-polarity and overcurrent protected battery disconnect in portable medical devices. IC Role / Device Role: Single N-channel high-side load switch with integrated charge pump or external bootstrap circuitry. Use Value: Supports 100 A inrush current handling and <10 mΩ on-resistance ensures <100 mV dropout at 10 A, preserving battery runtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 100 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF100P121 | RDS(on) = 7.2 mΩ @ 10 V; Qg = 48 nC; TO-220 package; RthJA = 62 °C/W (std. PCB) | Higher thermal resistance limits power density; unsuitable for space-constrained SMT-only designs. | Choose only when through-hole assembly and lower gate charge sensitivity are acceptable. |
| DMTH10H015LPS | RDS(on) = 1.5 mΩ @ 10 V; 150 V rating; PowerPAK 8x8 package; larger footprint (8.15 × 8.15 mm) | Over-specified voltage rating increases cost and layout area; not optimal for 100 V systems. | Select only if future-proofing for >120 V bus or need for lower RDS(on) justifies 2.6× board area increase. |
Compared with IRF100P121 and DMTH10H015LPS, SIDR104ADP-T1-RE3 uniquely balances 100 V rating, 6.1 mΩ RDS(on), 35.1 nC Qg, and PowerPAK SO-8DC's 6.15 × 5.15 mm footprint - making it the most area- and thermally efficient choice for high-current, high-frequency 48–60 V input DC/DC converters.
Availability
SIDR104ADP-T1-RE3 is available at Aetrix Electronics and suitable for synchronous rectification, primary-side switching, and high-current DC/DC converter applications requiring stable component supply, long-term production continuity, and RoHS-compliant packaging.
Supply support for SIDR104ADP-T1-RE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, ruggedness, and miniaturization.
The SIDR104ADP-T1-RE3 belongs to Vishay's TrenchFET® Gen IV power MOSFET family, engineered specifically for high-frequency, high-current power conversion in data center, telecom, and industrial power supplies where low FOM and thermal performance are decisive.
FAQ
What is the maximum continuous drain current for SIDR104ADP-T1-RE3 at 70 °C case temperature?
The maximum continuous drain current for SIDR104ADP-T1-RE3 is 64.8 A at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limits of the PowerPAK® SO-8DC package under sustained high-power operation and must be verified against actual PCB copper area and airflow in the target application. SIDR104ADP-T1-RE3 maintains RDS(on) stability across this range due to its −0.35%/°C RDS(on) tempco.
Does SIDR104ADP-T1-RE3 support logic-level gate drive?
SIDR104ADP-T1-RE3 has a gate threshold voltage (VGS(th)) of 2–4 V, enabling reliable turn-on with 3.3 V or 5 V logic-level gate drivers. However, full enhancement to RDS(on) = 6.1 mΩ requires VGS ≥ 10 V; at 7.5 V, RDS(on) rises to 7.2 mΩ. For logic-level operation, confirm system VGS margin and gate drive strength - SIDR104ADP-T1-RE3's low Qg (35.1 nC) eases drive requirements.
What is the thermal resistance from junction to case (RthJC) for SIDR104ADP-T1-RE3?
The maximum junction-to-case (drain) thermal resistance for SIDR104ADP-T1-RE3 is 1.25 °C/W under steady-state conditions, per the Thermal Resistance Ratings table. This value applies to heat flow from the die through the exposed drain pad to the PCB copper or heatsink. The low RthJC enables >60 W power dissipation with minimal temperature rise when mounted on ≥2 oz. copper with thermal vias - a key advantage of the PowerPAK® SO-8DC package used by SIDR104ADP-T1-RE3.
Is SIDR104ADP-T1-RE3 suitable for avalanche energy handling?
Yes - SIDR104ADP-T1-RE3 is rated for single-pulse avalanche energy (EAS) of 61 mJ and single-pulse avalanche current (IAS) of 35 A (L = 0.1 mH), with 100% UIS testing performed in production. These ratings validate its ruggedness in inductive switching applications like motor drives and non-synchronous flyback converters where voltage spikes may occur. SIDR104ADP-T1-RE3's avalanche capability is intrinsic to its TrenchFET® Gen IV design and does not require external snubbers for typical clamp conditions.
What are the PCB pad recommendations for SIDR104ADP-T1-RE3's PowerPAK® SO-8DC package?
Vishay recommends minimum PCB pads per Application Note 826: 4.42 mm × 6.61 mm for the drain thermal pad, with 0.61 mm wide traces connecting to inner-layer copper planes via ≥8 thermal vias (0.3 mm diameter, 0.15 mm annular ring). Source and gate pads follow standard SO-8 land patterns. Avoid solder mask defined (SMD) pads for the drain - use non-solder-mask-defined (NSMD) to maximize copper adhesion. SIDR104ADP-T1-RE3's reliability depends on proper thermal pad implementation per www.vishay.com/doc?72599.
SIDR104ADP-T1-RE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 18.8A (Ta), 81A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 7.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 6.1mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 70 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3250 pF @ 50 V
- FET Feature:
- -
- Power Dissipation (Max):
- 5.4W (Ta), 100W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8DC
SIDR104ADP-T1-RE3 FAQ
1.How can I place an order for SIDR104ADP-T1-RE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIDR104ADP-T1-RE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIDR104ADP-T1-RE3 reliable?
The price and inventory of SIDR104ADP-T1-RE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIDR104ADP-T1-RE3 is usually 5 days.
3.What payment methods are accepted for SIDR104ADP-T1-RE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIDR104ADP-T1-RE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIDR104ADP-T1-RE3?
SIDR104ADP-T1-RE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIDR104ADP-T1-RE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIDR104ADP-T1-RE3?
For technical support, including SIDR104ADP-T1-RE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIDR104ADP-T1-RE3 requirements.
6.How does Aetrix verify that SIDR104ADP-T1-RE3 is sourced from the original manufacturer or authorized distributors?
All SIDR104ADP-T1-RE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIDR104ADP-T1-RE3 meets industry standards.
7.What is the process for return or replacement of SIDR104ADP-T1-RE3?
All SIDR104ADP-T1-RE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIDR104ADP-T1-RE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIDR104ADP-T1-RE3 part is unused and in its original packaging.
Return procedure for SIDR104ADP-T1-RE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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