Vishay Siliconix SIS778DN-T1-GE3
- Part No.:
- SIS778DN-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® 1212-8
- Datasheet:
-
SIS778DN-T1-GE3.pdf
- Description:
- MOSFET N-CH 30V 35A PPAK1212-8
- Quantity:
- Payment:

- Shipping:

Inventory:2,587
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SIS778DN-T1-GE3 from Vishay Siliconix is an N-channel 30 V (D-S) trench MOSFET with integrated Schottky diode in a PowerPAK® 1212-8 package, delivering RDS(on) = 5.0 mΩ at VGS = 10 V and 6.2 mΩ at VGS = 4.5 V, rated for 35 A continuous drain current at TC = 25 °C, and used in low-side switching for notebook PC system and memory power rails.
For engineers reviewing the SIS778DN-T1-GE3 datasheet, SIS778DN-T1-GE3 pinout, SIS778DN-T1-GE3 application, or SIS778DN-T1-GE3 equivalent, key selection criteria include its monolithic SkyFET architecture, 1.07 mm profile, 100 % Rg and UIS tested reliability, and thermal resistance of RthJC = 1.9 °C/W (typical) enabling high-current density DC-DC output stages.
Technical Context
This device integrates a trench-based N-channel MOSFET and a Schottky diode on a single die within the PowerPAK 1212-8 leadless package, supporting synchronous rectification and body-diode conduction with trr = 19–38 ns and Qrr = 8–16 nC. Its gate threshold voltage VGS(th) ranges from 1.0 V to 2.2 V, enabling compatibility with 3.3 V and 4.5 V logic-level drive.
The MOSFET features Ciss = 1390 pF, Coss = 335 pF, and Crss = 145 pF at VDS = 15 V, with total gate charge Qg = 13.3 nC (VGS = 4.5 V) and 27.5 nC (VGS = 10 V), optimized for fast switching in high-frequency buck converters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum drain-source blocking voltage for 5 V input rail applications |
| RDS(on) @ VGS = 10 V | 5.0 mΩ max - Enables ≤ 500 mW conduction loss at 10 A, critical for efficiency in compact notebook VRMs |
| RDS(on) @ VGS = 4.5 V | 6.2 mΩ max - Supports direct drive from 4.5 V gate drivers without level-shifting |
| ID (continuous, TC = 25 °C) | 35 A - High current capability enabled by low RthJC = 1.9 °C/W and exposed drain pad |
| Qg @ VGS = 4.5 V | 13.3 nC typ - Reduces gate drive power and switching losses in 300–1000 kHz DC-DC stages |
| VSD @ IS = 2 A | 0.5–0.7 V - Low forward voltage Schottky diode minimizes reverse recovery loss during dead-time conduction |
| trr | 19–38 ns - Fast body diode recovery supports high-frequency synchronous operation without shoot-through risk |
Pinout & Package
PowerPAK® 1212-8 is a leadless surface-mount package with 3.30 mm × 3.30 mm footprint and 1.07 mm maximum height, featuring an exposed copper drain pad on the bottom side for low thermal resistance and high-current routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Source (S) | Four parallel source terminals reduce source inductance and improve current sharing in high-dI/dt switching |
| 5, 6, 7, 8 | Drain (D) | Four parallel drain terminals connect to the exposed bottom pad, providing primary thermal and current path to PCB |
| 4 | Gate (G) | Single gate terminal located adjacent to source pins for minimized gate loop inductance and stable turn-on/turn-off |
Key Features
| Feature | Design Value |
|---|---|
| SkyFET Monolithic Integration | Co-located trench MOSFET + Schottky diode eliminates external diode placement and layout mismatch in synchronous buck outputs |
| 100 % Rg and UIS Tested | Ensures gate robustness against transient overvoltage and ruggedness under unclamped inductive switching stress |
| PowerPAK 1212-8 Package | Delivers RthJC = 1.9 °C/W (typ), outperforming SO-8 and TSSOP-8 by >10× in thermal resistance for same footprint area |
| Halogen-free & RoHS Compliant | Fulfills IEC 61249-2-21 and Directive 2002/95/EC requirements for environmentally constrained notebook platforms |
| Low Profile (1.07 mm) | Enables ultra-thin notebook designs where component height is limited to <1.2 mm above PCB |
Applications
| Notebook System Power | Notebook Memory Power |
|---|---|
Use Scenario: Primary 5 V or 3.3 V system rail in ultraportable notebooks requiring high-efficiency, space-constrained DC-DC conversion. IC Role / Device Role / Timing Role: Low-side synchronous rectifier in multiphase buck converter delivering up to 35 A per phase. Use Value: 5.0 mΩ RDS(on) reduces conduction loss by >30 % vs. comparable TSSOP-8 MOSFETs, extending battery runtime. | Use Scenario: DDR memory VDDQ or VTT termination supply in dual-channel memory subsystems. IC Role / Device Role / Timing Role: Low-side switch in point-of-load regulator with fast transient response and minimal output impedance. Use Value: 13.3 nC Qg at 4.5 V enables clean switching at ≥500 kHz, reducing output filter size and improving load-step regulation. |
| High-Density VRM Output Stage | Thin-Film Power Module Core |
Use Scenario: Output stage in embedded VRM modules for CPU/GPU core voltage regulation in fanless notebooks. IC Role / Device Role / Timing Role: High-current, low-RDS(on) switch paired with companion high-side MOSFET in compact 1212 footprint. Use Value: Exposed drain pad allows direct thermal coupling to internal ground plane, maintaining TJ < 105 °C at full 35 A load. | Use Scenario: Integrated power stage in thin-film module assemblies where vertical stacking height must be <1.1 mm. IC Role / Device Role / Timing Role: Monolithic MOSFET+Schottky die serving as both main switch and freewheeling element in half-bridge topology. Use Value: 19 ns trr enables dead-time reduction to <20 ns, minimizing voltage overshoot and improving light-load efficiency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel MOSFET with Schottky diode applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiR872DP-T1-GE3 | 30 V, RDS(on) = 3.8 mΩ @ 10 V, PowerPAK 1212-8, but no integrated Schottky diode | Requires external Schottky for freewheeling; higher board area and BOM count | Select when lower RDS(on) is prioritized over integration and layout simplicity |
| SiZ730DT-T1-GE3 | 30 V, RDS(on) = 5.2 mΩ @ 10 V, PowerPAK 1212-8, integrated Schottky, but Qg = 15.2 nC @ 4.5 V | Higher gate charge increases driver loss and limits max switching frequency | Select when tighter VGS(th) tolerance (1.2–2.0 V) is required for precise gate control |
Compared with SiR872DP-T1-GE3 and SiZ730DT-T1-GE3, the SIS778DN-T1-GE3 uniquely balances low RDS(on), integrated Schottky, and moderate Qg, making it optimal for space- and efficiency-critical notebook low-side applications where monolithic integration reduces layout risk and improves thermal margin.
Availability
SIS778DN-T1-GE3 is available at Aetrix Electronics and suitable for notebook PC system power, memory VRMs, and high-density VRM output stages requiring stable component supply, consistent lead-free/halogen-free compliance, and verified thermal performance in production volumes.
Supply support for SIS778DN-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, thermal reliability, and miniaturization.
The SIS778DN-T1-GE3 belongs to Vishay's SkyFET PowerPAK family, engineered specifically for high-current, low-voltage DC-DC conversion in portable computing and thin-profile power systems.
FAQ
What is the maximum continuous drain current rating for SIS778DN-T1-GE3 at case temperature of 70 °C?
The SIS778DN-T1-GE3 is rated for 35 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This rating is sustained due to its low RthJC = 1.9 °C/W (typical) and exposed drain pad design, which efficiently transfers heat to the PCB. The SIS778DN-T1-GE3 maintains this current capability without derating until TC exceeds 70 °C, where thermal limiting begins per the current derating curve.
Does SIS778DN-T1-GE3 include a built-in Schottky diode, and what is its forward voltage?
Yes, the SIS778DN-T1-GE3 integrates a monolithic Schottky diode co-located with the MOSFET die. Its body diode forward voltage VSD is 0.5–0.7 V at IS = 2 A and TJ = 25 °C, as confirmed in the Drain-Source Body Diode Characteristics section. This low VSD reduces conduction loss during freewheeling in synchronous buck topologies, and the SIS778DN-T1-GE3 leverages this feature for improved light-load efficiency without external diode components.
What is the gate threshold voltage range for SIS778DN-T1-GE3, and how does it affect drive compatibility?
The gate threshold voltage VGS(th) for SIS778DN-T1-GE3 is 1.0 V minimum to 2.2 V maximum at ID = 250 µA, enabling reliable turn-on with standard 3.3 V and 4.5 V logic-level gate drivers. This range ensures the SIS778DN-T1-GE3 remains fully enhanced across process and temperature variation, and the SIS778DN-T1-GE3 achieves RDS(on) = 6.2 mΩ max at VGS = 4.5 V-critical for direct-drive applications without gate boosting.
Is SIS778DN-T1-GE3 compatible with lead-free reflow soldering, and what is the peak temperature limit?
Yes, the SIS778DN-T1-GE3 is qualified for lead-free reflow soldering with a maximum peak temperature of 240 °C for 20–40 seconds, per Vishay document 73257. It meets JEDEC J-STD-020 moisture sensitivity level 1 (MSL1) and is rated for 260 °C peak per IPC/JEDEC standards. The SIS778DN-T1-GE3's PowerPAK 1212-8 package is designed for robust thermal cycling performance under these conditions, with no manual soldering recommended.
How does the PowerPAK 1212-8 package of SIS778DN-T1-GE3 improve thermal performance compared to SO-8?
The PowerPAK 1212-8 package of SIS778DN-T1-GE3 delivers RthJC = 1.9 °C/W (typical), over 10× better than standard SO-8 (≈20 °C/W), due to its exposed copper drain pad and reduced interfacial layers. In a 4-layer FR-4 board test, the SIS778DN-T1-GE3 shows only a 4.8 °C junction-to-board rise at 2 W dissipation, versus >40 °C for SO-8-directly preserving RDS(on) stability and enabling higher current density. This thermal advantage is intrinsic to the SIS778DN-T1-GE3 package construction and validated in Vishay AN822.
SIS778DN-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Package/Case:
- PowerPAK® 1212-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 35A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 5mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 2.2V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 42.5 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 1390 pF @ 15 V
- FET Feature:
- Schottky Diode (Body)
- Power Dissipation (Max):
- 52W (Tc)
- Operating Temperature:
- -50°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® 1212-8
SIS778DN-T1-GE3 FAQ
1.How can I place an order for SIS778DN-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIS778DN-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIS778DN-T1-GE3 reliable?
The price and inventory of SIS778DN-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIS778DN-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIS778DN-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIS778DN-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIS778DN-T1-GE3?
SIS778DN-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIS778DN-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIS778DN-T1-GE3?
For technical support, including SIS778DN-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIS778DN-T1-GE3 requirements.
6.How does Aetrix verify that SIS778DN-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIS778DN-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIS778DN-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIS778DN-T1-GE3?
All SIS778DN-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIS778DN-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIS778DN-T1-GE3 part is unused and in its original packaging.
Return procedure for SIS778DN-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SIS778DN-T1-GE3 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

