Vishay Siliconix SISA72DN-T1-GE3
- Part No.:
- SISA72DN-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® 1212-8
- Datasheet:
-
SISA72DN-T1-GE3.pdf
- Description:
- MOSFET N-CH 40V 60A PPAK1212-8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SISA72DN-T1-GE3 from Vishay Siliconix is an N-channel 40 V (D-S) TrenchFET® Gen IV power MOSFET in PowerPAK® 1212-8 package, delivering RDS(on) = 3.5 mΩ at VGS = 10 V and 4.8 mΩ at VGS = 4.5 V, with 60 A continuous drain current (TJ = 150 °C) and 19.5 nC total gate charge - optimized for high-efficiency synchronous rectification and DC/DC power supplies.
For engineers reviewing the SISA72DN-T1-GE3 datasheet, SISA72DN-T1-GE3 pinout, SISA72DN-T1-GE3 application, or SISA72DN-T1-GE3 equivalent, this page provides verified device identity, validated thermal and switching parameters, confirmed PowerPAK 1212-8 terminal mapping, real-world application context for telecom POL and battery protection circuits, and two technically documented alternative MOSFETs with explicit functional and layout differences.
Technical Context
This MOSFET uses TrenchFET® Gen IV silicon technology, tuned specifically for low RDS(on) × Qoss figure-of-merit, with 100 % Rg and UIS testing performed. Its gate threshold voltage ranges from 1.1 V to 2.4 V, and it features a body diode with trr = 31 ns and Qrr = 23 nC at IF = 10 A.
The PowerPAK 1212-8 package provides ultra-low junction-to-case thermal resistance (RthJC = 1.9 °C/W typ.), direct bottom-side copper exposure for enhanced board-level heat transfer, and a 3.3 mm × 3.3 mm footprint - enabling high-current density designs without forced cooling in space-constrained applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 40 V - maximum drain-source blocking voltage suitable for 12 V and 24 V input DC/DC systems |
| RDS(on) @ 10 V | 3.5 mΩ max - enables <1 W conduction loss at 60 A, critical for high-current synchronous rectifiers |
| RDS(on) @ 4.5 V | 4.8 mΩ max - supports logic-level gate drive in low-voltage control architectures |
| Qg @ 10 V | 41.5 nC typ - determines gate driver power requirement and switching speed in hard-switched topologies |
| ID (continuous) | 60 A @ TC = 25 °C - rated for high-current power stages when mounted on thermally robust PCBs |
| RthJC | 1.9 °C/W typ. - allows >50 W power dissipation with minimal junction temperature rise when heatsinked to PCB copper |
| Body diode trr | 31 ns typ. - reduces reverse recovery losses in synchronous buck converters operating above 300 kHz |
Pinout & Package
PowerPAK® 1212-8 is a leadless surface-mount package with exposed drain pad on the bottom side and 8 terminals on the periphery. Dimensions: 3.3 mm × 3.3 mm × 1.04 mm (L × W × H), with 0.65 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Source (S) | Four parallel source connections reduce source inductance and improve current sharing in high-di/dt switching |
| 5, 6, 7, 8 | Drain (D) | Four parallel drain terminals tied to large bottom-side copper pad for optimal thermal and electrical path to PCB |
| 4 | Gate (G) | Single gate terminal located adjacent to source pins - enables Kelvin-source gate drive layout for precise VGS control |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen IV silicon | Delivers lowest RDS(on) × Qoss FOM among 40 V discrete MOSFETs in same package class |
| 100 % Rg and UIS tested | Ensures gate robustness against transient overvoltage and ruggedness under unclamped inductive switching stress |
| Exposed drain pad | Enables direct thermal coupling to PCB ground plane - reduces RthJA by up to 60 % vs. standard SO-8 |
| Lead (Pb)-free and halogen-free | Complies with RoHS Directive 2011/65/EU and JEDEC JS709E material requirements |
| Low Qgd/Qg ratio | 0.10 typical (4.2/41.5 nC) - improves hard-switching EMI behavior and Miller immunity in high-dV/dt environments |
Applications
| Server VRM Output Stage | Telecom Point-of-Load Converter |
|---|---|
Use Scenario: High-current, high-frequency synchronous buck converter supplying core voltage to multi-core CPUs in 1U servers. IC Role / Device Role / Timing Role: Low-side synchronous rectifier MOSFET handling up to 60 A DC output current with <10 ns switching transitions. Use Value: 3.5 mΩ RDS(on) minimizes conduction loss at full load; 19.5 nC Qg enables efficient 1 MHz operation with standard gate drivers. | Use Scenario: 48 V to 3.3 V/12 V isolated DC/DC brick powering baseband processing units in 5G radio units. IC Role / Device Role / Timing Role: Secondary-side synchronous rectifier in forward or active-clamp forward topology, operating at 300–500 kHz. Use Value: 31 ns body diode trr and low Qrr suppress shoot-through risk and reduce dead-time losses during zero-voltage switching transitions. |
| Battery Protection Circuit | Industrial Motor Drive Half-Bridge |
Use Scenario: Smart Li-ion battery pack with integrated protection IC monitoring overcurrent, short-circuit, and overtemperature events. IC Role / Device Role / Timing Role: Primary discharge path switch placed between battery cell stack and load connector, controlled by protection ASIC. Use Value: 60 A continuous rating supports >50 A peak loads; 40 V VDS accommodates 10S Li-ion packs (up to 42 V fully charged). | Use Scenario: 24 V BLDC motor controller for HVAC actuators or robotic joints requiring compact, thermally efficient half-bridge outputs. IC Role / Device Role / Timing Role: High-side or low-side switch in three-phase inverter stage, driven by isolated gate driver with 4.5 V logic compatibility. Use Value: 4.8 mΩ RDS(on) @ 4.5 V ensures full enhancement with microcontroller GPIO drive; PowerPAK 1212-8 footprint saves >40 % board area vs. TSSOP-8. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 40 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiR872DP-T1-GE3 | Same PowerPAK 1212-8 package; higher RDS(on) = 4.0 mΩ @ 10 V; lower Qg = 34 nC | Better suited for high-frequency, low-Qg applications where conduction loss margin exists | Select when prioritizing switching efficiency over conduction loss in sub-500 kHz designs |
| IRFH8326TRPBF | PowerSO-8 package; RDS(on) = 3.2 mΩ @ 10 V; Qg = 42 nC; higher RthJC = 2.4 °C/W | Requires larger PCB footprint and additional thermal vias to match thermal performance | Choose only if legacy PowerSO-8 layout reuse is mandatory and thermal headroom permits |
Compared with SISA72DN-T1-GE3, SiR872DP-T1-GE3 trades 0.5 mΩ higher RDS(on) for 7.5 nC lower Qg, improving high-frequency efficiency but increasing conduction loss at >40 A; IRFH8326TRPBF offers marginally lower RDS(on) but requires 25 % more board area and delivers 26 % higher junction temperature rise under identical PCB thermal conditions.
Availability
SISA72DN-T1-GE3 is available at Aetrix Electronics and suitable for DC/DC power supplies, synchronous rectification circuits, and battery protection systems requiring stable component supply, long-term manufacturability, and RoHS-compliant sourcing.
Supply support for SISA72DN-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency and reliability.
The SISA72DN-T1-GE3 belongs to Vishay's TrenchFET® Gen IV family, engineered specifically for high-current, high-frequency DC/DC conversion in telecom, computing, and industrial power systems where low RDS(on) × Qoss and thermal density are critical.
FAQ
What is the maximum continuous drain current rating for SISA72DN-T1-GE3 at 70 °C case temperature?
The SISA72DN-T1-GE3 is rated for 60 A continuous drain current at both TC = 25 °C and TC = 70 °C, as specified in the Absolute Maximum Ratings table. This reflects its robust thermal design enabled by the PowerPAK 1212-8 package's low RthJC of 1.9 °C/W, allowing sustained high-current operation without derating across this case temperature range. The 60 A rating applies under steady-state conditions with proper PCB thermal management.
Does SISA72DN-T1-GE3 support 4.5 V gate drive in practical applications?
Yes, SISA72DN-T1-GE3 is fully characterized for 4.5 V gate drive: RDS(on) is guaranteed ≤ 4.8 mΩ at VGS = 4.5 V and ID = 10 A, and its gate threshold voltage (VGS(th)) ranges from 1.1 V to 2.4 V - ensuring strong enhancement with standard 4.5 V logic-level controllers. This makes SISA72DN-T1-GE3 suitable for microcontroller-driven motor control and battery-powered systems where 5 V rail availability is constrained.
What is the thermal resistance from junction to ambient for SISA72DN-T1-GE3 on a standard FR4 board?
On a 1" × 1" FR4 board, the SISA72DN-T1-GE3 has a maximum junction-to-ambient thermal resistance (RthJA) of 33 °C/W, with a typical value of 24 °C/W. This value assumes surface mounting per Vishay's recommended land pattern (Document 72597). Performance improves significantly with added copper area: extending the drain pad beyond 0.3 in² yields diminishing returns, while solid internal copper planes can reduce RthJA to <15 °C/W in optimized 4-layer boards.
Is SISA72DN-T1-GE3 suitable for avalanche energy handling in inductive switching applications?
Yes, SISA72DN-T1-GE3 is rated for single-pulse avalanche energy (EAS) of 20 mJ and single-pulse avalanche current (IAS) of 20 A with L = 0.1 mH. These ratings are validated per JEDEC standards and confirm its capability to safely absorb inductive energy during unclamped inductive switching events - a key requirement in motor drive and relay driving applications where flyback energy must be managed without external snubbers.
How does the PowerPAK 1212-8 package of SISA72DN-T1-GE3 compare to SO-8 in thermal performance?
The PowerPAK 1212-8 package used by SISA72DN-T1-GE3 achieves a typical junction-to-case thermal resistance (RthJC) of 1.9 °C/W, versus ~20 °C/W for standard SO-8 - a 10× improvement. In practical terms, under 2 W dissipation on a 45 °C board, SISA72DN-T1-GE3 reaches only 49.8 °C junction temperature, while an SO-8 device would exceed 85 °C. This enables higher power density, reduced rDS(on) drift, and elimination of external heatsinks in many mid-power applications.
SISA72DN-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET® Gen IV
- Package/Case:
- PowerPAK® 1212-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 40 V
- Current - Continuous Drain (Id) @ 25°C:
- 60A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 3.5mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 2.4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 30 nC @ 4.5 V
- Vgs (Max):
- +20V, -16V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3240 pF @ 20 V
- FET Feature:
- -
- Power Dissipation (Max):
- 52W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® 1212-8
SISA72DN-T1-GE3 FAQ
1.How can I place an order for SISA72DN-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SISA72DN-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SISA72DN-T1-GE3 reliable?
The price and inventory of SISA72DN-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SISA72DN-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SISA72DN-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SISA72DN-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SISA72DN-T1-GE3?
SISA72DN-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SISA72DN-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SISA72DN-T1-GE3?
For technical support, including SISA72DN-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SISA72DN-T1-GE3 requirements.
6.How does Aetrix verify that SISA72DN-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SISA72DN-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SISA72DN-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SISA72DN-T1-GE3?
All SISA72DN-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SISA72DN-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SISA72DN-T1-GE3 part is unused and in its original packaging.
Return procedure for SISA72DN-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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