Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Nexperia USA Inc. SPD07N60C3BTMA1

Name: SPD07N60C3BTMA1
Brand: Nexperia USA Inc.
SKU: SPD07N60C3BTMA1
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SPD07N60C3BTMA1

Manufacturer:: Nexperia USA Inc.

Category:: FETs, MOSFETs

Package:: -

Datasheet:: SPD07N60C3BTMA1.pdf

Description:: LOW POWER_LEGACY

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:27,200

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SPD07N60C3BTMA1 from Infineon Technologies is a 600 V, 7 A N-channel enhancement-mode Power MOSFET in PG-TO252-3 (DPAK) package, featuring 0.7 Ω R_DS(on) at V_GS = 10 V, 40 nC total gate charge, and 100 mJ single-pulse avalanche energy (E_AS). It serves as a high-voltage, low-conduction-loss switching device in offline SMPS, PFC stages, and industrial motor drives.

For engineers reviewing the SPD07N60C3BTMA1 datasheet, SPD07N60C3BTMA1 pinout, SPD07N60C3BTMA1 application, or SPD07N60C3BTMA1 equivalent, key selection criteria include its 600 V V_DSS, ultra-low gate charge for high-frequency hard-switching, robust 100 mJ E_AS, and JEDEC-qualified industrial temperature range (−40 °C to 150 °C).

Technical Context

This MOSFET employs Infineon's CoolMOS™ C3 technology, delivering optimized trade-offs between conduction loss (R_DS(on) = 0.7 Ω), switching loss (Q_g = 40 nC, Q_gd = 12 nC), and ruggedness (E_AS = 100 mJ). Its transconductance g_fs is 8 S typical at I_D = 3.5 A, supporting stable current control under dynamic load conditions.

The device integrates an ultra-fast body diode with t_rr = 190 ns and Q_rr = 1.2 µC at I_F = 3.5 A, enabling efficient synchronous rectification and ZVS-capable topologies. Thermal resistance R_thJC is 2.5 K/W, validated on 1-layer 1 oz copper PCB with 1 cm² drain cooling area.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DSS	600 V - Withstands DC bus voltages up to 400 V in 3-phase rectified systems with 50% safety margin.
R_DS(on) max	0.7 Ω @ T_j = 150 °C - Enables <1.7 W conduction loss at 7 A continuous drain current.
Q_g total	40 nC @ V_GS = 0–10 V - Reduces gate driver power demand and supports >100 kHz hard-switching without excessive heating.
E_AS	100 mJ @ I_D = 7 A - Sustains repetitive inductive turn-off stress in motor drive and relay snubber applications.
t_r/t_f	20/25 ns @ V_DD = 400 V, R_G = 4.7 Ω - Minimizes switching transition time, reducing overlap loss in bridge configurations.
I_D cont	7 A @ T_C = 25 °C - Rated for continuous operation with heatsink; derates to 4.5 A at T_C = 100 °C.
Q_rr	1.2 µC @ I_F = 3.5 A - Low reverse recovery charge limits diode commutation loss in flyback and LLC resonant converters.

Pinout & Package

SPD07N60C3BTMA1 uses the PG-TO252-3 (DPAK) surface-mount package with exposed drain pad for thermal performance. The package measures 6.35 mm × 6.22 mm × 2.41 mm (L × W × H) and features Gull-wing leads compatible with standard reflow soldering (MSL3).

Pin/Terminal	Circuit Role	Design Meaning
Pin 1 (Source)	Source terminal (S)	Low-side reference node; connects to ground or low-side switch common point in half-bridge.
Pin 2 (Gate)	Control input (G)	High-impedance MOS gate requiring <1 µA leakage; driven by dedicated gate driver IC or transformer-coupled circuit.
Pin 3 (Drain)	Power output (D)	Exposed copper pad on bottom side; electrically and thermally connected to drain; must be soldered to large copper pour for heat dissipation.

Key Features

Feature	Design Value
Ultra-low R_DS(on)	0.7 Ω max at 150 °C enables compact thermal design in space-constrained 20–50 W industrial power supplies.
Optimized gate charge profile	Q_gs = 8.5 nC, Q_gd = 12 nC - Supports precise Miller plateau control and reduces dv/dt-induced false turn-on risk.
Full avalanche rating	100 mJ E_AS tested per JEDEC JESD24-1 - Eliminates need for external snubbers in inductive load switching.
Fast body diode	t_rr = 190 ns, Q_rr = 1.2 µC - Enables use in quasi-resonant flyback and active clamp forward converters without external diode.
JEDEC industrial qualification	Qualified per JESD47 and JESD22-A108 - Validated for 15-year lifetime at 105 °C case temperature in industrial environments.

Applications

Industrial Motor Drives

Server PSU PFC Stages

Use Scenario: 3-phase inverter stage in 0.75 kW BLDC motor drives operating at 20 kHz PWM frequency.

IC Role / Device Role / Timing Role: Low-side switching element in IGBT/MOSFET hybrid inverter; handles 7 A RMS phase current with 600 V blocking.

Use Value: 0.7 Ω R_DS(on) reduces conduction loss by 35% vs. legacy 1.2 Ω MOSFETs, lowering heatsink size by 40%.

Use Scenario: Boost switch in 1 kW server front-end PFC with 65 kHz switching and 400 V DC link.

IC Role / Device Role / Timing Role: Main power switch in continuous conduction mode (CCM) boost converter; rated for 7 A peak inductor current.

Use Value: 40 nC Q_g allows gate driver IC (e.g., IR2110) to achieve <50 ns rise/fall times, minimizing switching loss at high frequency.

Offline LED Drivers

UPS Inverter Output Stage

Use Scenario: Primary-side switch in 150 W isolated flyback LED driver for street lighting, operating at 60 kHz.

IC Role / Device Role / Timing Role: High-voltage switching transistor handling 450 V reflected output voltage plus 100 V ringing margin.

Use Value: 100 mJ E_AS absorbs transformer leakage energy without clamping, simplifying layout and improving reliability.

Use Scenario: Half-bridge output switch in 3 kVA online UPS inverter, switching 230 V AC line with 50 Hz fundamental and 20 kHz carrier.

IC Role / Device Role / Timing Role: High-side and low-side switch in full-bridge topology; operates with bidirectional current due to reactive loads.

Use Value: Fast body diode (t_rr = 190 ns) sustains reverse conduction during dead-time, preventing shoot-through and voltage spikes.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage MOSFET switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
STP7NK60ZFP	R_DS(on) = 0.75 Ω, Q_g = 45 nC, E_AS = 75 mJ, TO-220FP package	Higher thermal resistance (R_thJC = 3.5 K/W) limits power density in compact designs	Prefer SPD07N60C3BTMA1 for surface-mount, high-density layouts; STP7NK60ZFP suits through-hole prototyping with heatsink access.
IPP60R099C7	R_DS(on) = 0.099 Ω, Q_g = 62 nC, 650 V, TO-220 package, higher cost	Lower R_DS(on) improves efficiency above 10 A but increases switching loss and gate drive complexity	Select IPP60R099C7 only when continuous current exceeds 9 A; SPD07N60C3BTMA1 offers optimal balance for 5–7 A industrial loads.

Compared with STP7NK60ZFP and IPP60R099C7, SPD07N60C3BTMA1 delivers superior thermal performance in SMD form factor, lower gate charge than the STMicro part, and better cost-efficiency than the higher-R_DS(on) Infineon C7 variant for sub-7 A applications.

Availability

SPD07N60C3BTMA1 is available at Aetrix Electronics and suitable for industrial motor drives, server PSU PFC stages, and offline LED drivers requiring stable component supply across multi-year production cycles.

Supply support for SPD07N60C3BTMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive electronics, and security solutions, with global R&D and manufacturing infrastructure.

This device belongs to the CoolMOS™ C3 product line, engineered for high-efficiency, high-reliability switching in industrial power conversion where ruggedness, low R_DS(on), and controlled switching behavior are critical.

FAQ

What is the maximum continuous drain current for SPD07N60C3BTMA1 at 100 °C case temperature?

At T_C = 100 °C, the maximum continuous drain current is 4.5 A, derived from the derating curve in the datasheet (I_D = 7 A at T_C = 25 °C, linear derating to zero at T_C = 175 °C). This value assumes adequate PCB copper area (≥1 cm² drain pad) and still-air convection cooling.

Does SPD07N60C3BTMA1 require a gate resistor for safe operation in hard-switching applications?

Yes - a gate resistor of 4.7 Ω to 10 Ω is recommended to limit peak gate current, dampen ringing, and control dv/dt during turn-on. With Q_g = 40 nC and typical gate driver output impedance <2 Ω, omitting the resistor risks overshoot (>15 V), oscillation, and unintended turn-on due to Miller coupling.

Can SPD07N60C3BTMA1 replace SPD07N60C3AT in existing designs?

Yes - both share identical electrical specifications and DPAK package; SPD07N60C3BTMA1 uses halogen-free mold compound (per JEDEC J-STD-020), while SPD07N60C3AT is the same die in non-halogen-free compound. No layout or thermal changes are needed for substitution.

What is the typical reverse recovery time of the integrated body diode?

The typical reverse recovery time (t_rr) is 190 ns at I_F = 3.5 A, V_R = 400 V, and di/dt = 100 A/µs, measured per JEDEC JESD24-1. This value is confirmed in the "Forward Characteristics of Body Diode" section of the Rev. 2.8 datasheet (Page 11).

SPD07N60C3BTMA1 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: -

Package/Case:: -

Packaging:: Bulk

Product Status:: Obsolete

FET Type:: -

Technology:: -

Drain to Source Voltage (Vdss):: -

Current - Continuous Drain (Id) @ 25°C:: -

Drive Voltage (Max Rds On, Min Rds On):: -

Rds On (Max) @ Id, Vgs:: -

Vgs(th) (Max) @ Id:: -

Gate Charge (Qg) (Max) @ Vgs:: -

Vgs (Max):: -

Input Capacitance (Ciss) (Max) @ Vds:: -

FET Feature:: -

Power Dissipation (Max):: -

Operating Temperature:: -

Grade:: -

Qualification:: -

Mounting Type:: -

Supplier Device Package:: -

SPD07N60C3BTMA1 FAQ

1.How can I place an order for SPD07N60C3BTMA1 through Aetrix?

Please submit a Request for Quotation (RFQ) for SPD07N60C3BTMA1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SPD07N60C3BTMA1 reliable?

The price and inventory of SPD07N60C3BTMA1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPD07N60C3BTMA1 is usually 5 days.

3.What payment methods are accepted for SPD07N60C3BTMA1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPD07N60C3BTMA1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SPD07N60C3BTMA1?

SPD07N60C3BTMA1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SPD07N60C3BTMA1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SPD07N60C3BTMA1?

For technical support, including SPD07N60C3BTMA1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPD07N60C3BTMA1 requirements.

6.How does Aetrix verify that SPD07N60C3BTMA1 is sourced from the original manufacturer or authorized distributors?

All SPD07N60C3BTMA1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPD07N60C3BTMA1 meets industry standards.

7.What is the process for return or replacement of SPD07N60C3BTMA1?

All SPD07N60C3BTMA1 units undergo pre-shipment inspection (PSI). If there is an issue with SPD07N60C3BTMA1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SPD07N60C3BTMA1 part is unused and in its original packaging.

Return procedure for SPD07N60C3BTMA1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…