Toshiba Semiconductor and Storage SSM3J114TU(TE85L)
- Part No.:
- SSM3J114TU(TE85L)
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- FETs, MOSFETs
- Package:
- 3-SMD, Flat Leads
- Datasheet:
-
SSM3J114TU(TE85L).pdf
- Description:
- MOSFET P-CH 20V 1.8A UFM
- Quantity:
- Payment:

- Shipping:

Inventory:93
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Product details
Overview
SSM3J114TU(TE85L) from Toshiba is a silicon P-channel MOSFET designed for low-voltage, high-speed switching and power management in compact DC-DC converters and load switches. It delivers RDS(ON) = 149 mΩ (max) at VGS = −4.0 V, supports 1.5 V logic-level drive, and operates with VDS = −20 V and ID = −1.8 A (DC), making it suitable for battery-powered portable electronics.
For engineers reviewing the SSM3J114TU(TE85L) datasheet, SSM3J114TU(TE85L) pinout, SSM3J114TU(TE85L) application, or SSM3J114TU(TE85L) equivalent, key selection criteria include its 1.5 V gate threshold compatibility, low RDS(ON) at sub-2 V drive, UFM package thermal performance on FR4, and verified switching times (ton/toff ≤ 19/18 ns).
Technical Context
This P-channel enhancement-mode MOSFET uses planar silicon process technology optimized for low gate charge (Qg = 7.7 nC) and fast switching in common-source configuration. Its Vth range of −0.3 to −1.0 V enables reliable turn-on with 1.5–2.5 V control rails while maintaining robust off-state blocking (VBR(DSS) = −20 V).
Thermal design is constrained by two distinct PD ratings: 800 mW on ceramic board (Note 1) and 500 mW on standard FR4 (Note 2), reflecting its UFM package's dependence on PCB copper area and substrate conductivity for heat dissipation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | −20 V - Maximum drain-source voltage before breakdown; defines safe operating range in 12 V and lower systems. |
| RDS(ON) @ VGS = −1.5 V | 526 mΩ (max) - Enables 1.5 V logic-compatible switching with acceptable conduction loss at light loads. |
| ID (DC) | −1.8 A - Continuous drain current rating under FR4-mount thermal conditions; sets max steady-state load capability. |
| Qg | 7.7 nC - Total gate charge determines driver strength requirement and switching loss in PWM applications. |
| Ciss | 331 pF - Input capacitance affects gate drive impedance matching and high-frequency stability. |
| ton/toff | 19/18 ns - Verified switching times support >20 MHz operation in synchronous buck or load-switch topologies. |
| Vth | −0.3 to −1.0 V - Gate threshold spread ensures consistent turn-on across temperature and process variation. |
Pinout & Package
The SSM3J114TU(TE85L) is housed in Toshiba's UFM (Ultra Small Flat Mount) package - a 3-pin, surface-mount, leadless plastic package measuring 2.1 mm × 1.7 mm × 0.7 mm (typ.), with 6.6 mg mass and JEITA-compliant marking "2-2U1A".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Gate) | Control electrode | Accepts negative VGS to modulate channel; requires <1.0 V overdrive above Vth for full enhancement. |
| 2 (Source) | Reference terminal | Connected to higher potential rail (e.g., battery +); serves as return path for gate drive and load current. |
| 3 (Drain) | Power output terminal | Switches load to ground; carries full ID; layout must minimize inductance for clean switching waveforms. |
Key Features
| Feature | Design Value |
|---|---|
| 1.5 V logic-level drive compatibility | Guaranteed turn-on with standard low-voltage microcontroller GPIOs without level-shifting circuitry. |
| Low RDS(ON) at −2.5 V | 199 mΩ (max) enables efficient operation in 2.5–3.3 V supply domains such as USB-powered devices. |
| Ultra-small UFM footprint | 2.1 × 1.7 mm outline allows placement in space-constrained wearables and IoT sensor nodes. |
| Fast switching with low Qg | 7.7 nC total gate charge reduces driver power consumption and EMI in high-frequency DC-DC stages. |
| Specified RDS(ON) vs. temperature | Characterized from −25°C to 150°C, supporting thermal-aware design in automotive cabin modules and industrial controllers. |
Applications
| Portable Power Switching | USB-C Load Switch |
|---|---|
Use Scenario: Enabling/disabling power to peripheral circuits (e.g., display backlight, BLE radio) in smartphones and tablets to extend battery life. IC Role / Device Role: High-side load switch controlling VBAT-referenced loads with minimal quiescent current. Use Value: RDS(ON) ≤ 149 mΩ at −4 V ensures <0.7 mW conduction loss at 100 mA, preserving runtime. | Use Scenario: Implementing VCONN or Vbus switching in USB Type-C receptacles per USB PD specification. IC Role / Device Role: P-channel MOSFET used in hot-swap protection and inrush limiting circuits. Use Value: Verified ton/toff ≤ 19/18 ns supports fast fault response (<100 ns) during overcurrent events. |
| DC-DC Converter Synchronous Rectifier | Industrial Sensor Node Power Gating |
Use Scenario: Replacing Schottky diodes in buck converter outputs to improve efficiency in 3.3 V/5 V point-of-load regulators. IC Role / Device Role: Low-side synchronous rectifier driven by controller's complementary output. Use Value: Coss = 48 pF and Crss = 39 pF minimize reverse recovery losses and ringing at 1–2 MHz switching frequencies. | Use Scenario: Isolating power to analog front-end sensors (e.g., pressure, humidity) between measurement cycles in battery-operated environmental monitors. IC Role / Device Role: High-side power switch controlled by MCU GPIO with integrated gate pull-down. Use Value: Vth range (−0.3 to −1.0 V) ensures unambiguous turn-off at 0 V GPIO and turn-on at 1.8 V logic, eliminating external bias networks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel MOSFET switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AO3401 | RDS(ON) = 55 mΩ (max) @ VGS = −4.5 V; higher gate charge (Qg = 12 nC); SO-23 package (larger footprint) | Requires ≥4.5 V drive for optimal RDS(ON); less suitable for 1.8 V systems | Prefer when higher current (>2 A) and tighter RDS(ON) tolerance are needed, and board space permits SO-23. |
| DMN2011UVT | RDS(ON) = 170 mΩ (max) @ VGS = −2.5 V; same UFM package; lower Qg (5.5 nC) | Better 2.5 V drive performance but slightly higher on-resistance at −1.5 V | Select when prioritizing ultra-low gate drive energy and matching SSM3J114TU(TE85L)'s footprint exactly in dense layouts. |
Compared with AO3401 and DMN2011UVT, the SSM3J114TU(TE85L) offers the best balance of 1.5 V drive capability, UFM size, and verified switching speed-making it optimal for space- and voltage-constrained portable designs where gate drive voltage headroom is limited.
Availability
SSM3J114TU(TE85L) is available at Aetrix Electronics and suitable for portable power switching, USB-C load management, and industrial sensor node power gating requiring stable component supply and long-term lifecycle assurance.
Supply support for SSM3J114TU(TE85L) includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation is a Japanese semiconductor manufacturer specializing in discrete power devices, analog ICs, and memory solutions, with global distribution and automotive-grade qualification capabilities.
The SSM3J series targets low-voltage, high-efficiency power switching in consumer and industrial portable equipment, emphasizing logic-level compatibility, miniature packaging, and thermally robust performance on standard PCB substrates.
FAQ
What is the maximum continuous drain current for SSM3J114TU(TE85L) under standard PCB conditions?
The SSM3J114TU(TE85L) supports ID = −1.8 A (DC) when mounted on a standard FR4 board (25.4 mm × 25.4 mm × 1.6 mm, Cu pad 645 mm²), as specified in Note 2 of the Absolute Maximum Ratings. This rating assumes ambient temperature ≤ 25°C and accounts for thermal resistance limitations inherent to the UFM package on FR4.
Does SSM3J114TU(TE85L) support true 1.5 V gate drive, and what is its RDS(ON) at that voltage?
Yes, the SSM3J114TU(TE85L) is explicitly characterized for 1.5 V drive: RDS(ON) = 526 mΩ (max) at VGS = −1.5 V and ID = −0.1 A (pulse test). This enables direct interfacing with 1.5–1.8 V logic families without level shifters, confirmed in the Electrical Characteristics table.
What is the thermal resistance (RthJA) of SSM3J114TU(TE85L) on FR4, and how is it derived?
The SSM3J114TU(TE85L) does not specify RthJA directly, but its PD = 500 mW rating on FR4 (Note 2) implies an effective RthJA ≈ 300°C/W (calculated from ΔT = 150°C − 25°C = 125°C; 125°C ÷ 0.5 W = 250°C/W, rounded conservatively). Actual value depends on copper area and airflow, per the PD vs. Ta derating curve in the datasheet.
Can SSM3J114TU(TE85L) be used in place of an N-channel MOSFET in high-side switching configurations?
Yes - the SSM3J114TU(TE85L) is a P-channel MOSFET specifically intended for high-side switching, where the source connects to the positive rail and the gate is pulled low relative to source to turn on. Unlike N-channel devices, it avoids needing a floating gate driver, simplifying power path control in battery-input systems.
Is SSM3J114TU(TE85L) RoHS compliant and halogen-free?
Yes, the SSM3J114TU(TE85L) meets RoHS Directive 2011/65/EU requirements. Toshiba confirms RoHS compliance for this part in its official product documentation and environmental reports; halogen-free status is also verified per IEC 61249-2-21 standards.
SSM3J114TU(TE85L) Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- -
- Package/Case:
- 3-SMD, Flat Leads
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 20 V
- Current - Continuous Drain (Id) @ 25°C:
- 1.8A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 1.5V, 4V
- Rds On (Max) @ Id, Vgs:
- 149mOhm @ 600mA, 4V
- Vgs(th) (Max) @ Id:
- 1V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 7.7 nC @ 4 V
- Vgs (Max):
- ±8V
- Input Capacitance (Ciss) (Max) @ Vds:
- 331 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 500mW (Ta)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- UFM
SSM3J114TU(TE85L) FAQ
1.How can I place an order for SSM3J114TU(TE85L) through Aetrix?
Please submit a Request for Quotation (RFQ) for SSM3J114TU(TE85L) on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SSM3J114TU(TE85L) reliable?
The price and inventory of SSM3J114TU(TE85L) are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SSM3J114TU(TE85L) is usually 5 days.
3.What payment methods are accepted for SSM3J114TU(TE85L)?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SSM3J114TU(TE85L) transactions.
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4.How is shipping managed for SSM3J114TU(TE85L)?
SSM3J114TU(TE85L) orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SSM3J114TU(TE85L) order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SSM3J114TU(TE85L)?
For technical support, including SSM3J114TU(TE85L) datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SSM3J114TU(TE85L) requirements.
6.How does Aetrix verify that SSM3J114TU(TE85L) is sourced from the original manufacturer or authorized distributors?
All SSM3J114TU(TE85L) products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SSM3J114TU(TE85L) meets industry standards.
7.What is the process for return or replacement of SSM3J114TU(TE85L)?
All SSM3J114TU(TE85L) units undergo pre-shipment inspection (PSI). If there is an issue with SSM3J114TU(TE85L), returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SSM3J114TU(TE85L) part is unused and in its original packaging.
Return procedure for SSM3J114TU(TE85L):
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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