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Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Toshiba Semiconductor and Storage SSM3K37CT,L3F

Name: SSM3K37CT,L3F
Brand: Toshiba Semiconductor and Storage
SKU: SSM3K37CT,L3F
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SSM3K37CT,L3F

Manufacturer:: Toshiba Semiconductor and Storage

Category:: FETs, MOSFETs

Package:: SC-101, SOT-883

Datasheet:: SSM3K37CT,L3F.pdf

Description:: MOSFET N-CH 20V 200MA CST3

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Product details

Overview

SSM3K37CT,L3F from Toshiba is a silicon N-channel enhancement-mode MOSFET in CST3 (SOT-323) package, designed for low-voltage, high-speed switching and analog switch applications. It delivers R_DS(ON) = 5.60 Ω max at V_GS = 1.5 V, supports 20 V V_DSS, and operates with ±10 V gate drive capability - enabling use in battery-powered logic-level interface circuits and signal routing in portable electronics.

For engineers reviewing the SSM3K37CT,L3F datasheet, SSM3K37CT,L3F pinout, SSM3K37CT,L3F application, or SSM3K37CT,L3F equivalent, key selection criteria include verified 1.5 V gate threshold compatibility, sub-6 Ω on-resistance at ultra-low gate voltage, thermal performance on FR4 boards, and validated switching speed (t_on = 18 ns, t_off = 36 ns) under 2.5 V drive conditions.

Technical Context

This discrete MOSFET uses planar silicon process technology to achieve stable V_th = 0.35–1.0 V and low input capacitance (C_iss = 12 pF), supporting fast digital switching while minimizing gate drive power. Its channel temperature rating of 150°C and derated power dissipation (100 mW on FR4) reflect design intent for thermally constrained PCB layouts.

The device features source-connected substrate and standard three-terminal configuration (Gate–Source–Drain), with bottom-side electrodes and top-side polarity marking. Electrical behavior is characterized under pulse test conditions (duty ≤ 1%) to ensure accurate R_DS(ON) and |Y_fs| values across ambient temperatures from −55°C to 150°C.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DSS	20 V - Maximum drain-source blocking voltage; suitable for 3.3 V and 5 V rail switching without avalanche stress.
R_DS(ON) @ V_GS = 1.5 V	5.60 Ω max - Enables reliable 1.5 V logic-level turn-on in space-constrained battery management and USB port protection.
I_D (DC)	200 mA - Continuous current handling capacity; sufficient for LED drivers, sensor biasing, and load switching in wearables.
t_on/t_off	18 ns / 36 ns - Fast switching times support >10 MHz digital signal routing and PWM control in compact DC-DC feedback paths.
C_iss	12 pF - Low input capacitance reduces gate drive energy and improves noise immunity in high-density mixed-signal PCBs.
V_th	0.35–1.0 V - Guaranteed gate threshold range ensures robust turn-on margin even with aging or temperature drift in consumer IC interfaces.
P_D (FR4)	100 mW - Power limit defined on 10 mm × 10 mm × 1.0 mm FR4 board with 100 mm² copper pad; guides thermal layout decisions.

Pinout & Package

SSM3K37CT,L3F is housed in the CST3 (JEITA package code 2-1J1B) surface-mount package - identical to SOT-323 - with dimensions 2.0 × 1.25 × 0.9 mm and typical weight of 0.75 mg. Electrodes are located on the bottom side; top-side marking includes polarity indicator and "SU" identifier.

Pin/Terminal	Circuit Role	Design Meaning
1 (Gate)	Control electrode	Accepts logic-level voltage (≥1.5 V) to fully enhance channel; requires ESD-safe handling due to ±1 μA I_GSS leakage spec.
2 (Source)	Reference node for gate drive and current return path	Internally tied to substrate; must be connected to lowest potential in switching node to maintain safe V_GS limits.
3 (Drain)	Current output terminal	Carries switched load current up to 200 mA DC; exposed drain pad on bottom enables thermal conduction to PCB copper.

Key Features

Feature	Design Value
1.5 V gate drive compatibility	Guaranteed R_DS(ON) ≤ 5.60 Ω at V_GS = 1.5 V enables direct interfacing with Li-ion battery voltages and low-power MCU GPIOs.
Low gate charge & capacitance	C_iss = 12 pF and C_rss = 4.1 pF minimize switching losses and reduce EMI in high-frequency analog switch applications.
Thermally optimized CST3 package	Bottom-side drain pad and thin profile (0.9 mm height) allow efficient heat transfer to PCB copper, supporting 100 mW operation on standard FR4.
Wide operating temperature range	Specified from −55°C to +150°C channel temperature ensures reliability in automotive cabin modules and industrial sensors.

Applications

USB Port Protection	Smartphone Power Sequencing
Use Scenario: Isolating VBUS during hot-plug events to prevent backfeed into host circuitry. IC Role / Device Role: Low-side load switch controlling 5 V USB power path with 1.5 V enable signal from PMIC. Use Value: R_DS(ON) = 5.60 Ω max at 1.5 V ensures <100 mV drop at 20 mA fault current, preserving USB voltage compliance.	Use Scenario: Enabling/disabling subsystem rails (e.g., camera, display) during boot and sleep transitions. IC Role / Device Role: Discrete N-MOSFET used as active-high controlled power gate driven by 1.8 V application processor GPIO. Use Value: t_on/t_off = 18/36 ns allows precise timing control within 100 μs sequencing windows without external RC delays.
Wearable Sensor Biasing	IoT Button Debounce Circuit
Use Scenario: Providing regulated bias current to MEMS accelerometers and environmental sensors in hearables. IC Role / Device Role: Constant-current source configured with source degeneration resistor and 2.5 V gate bias. Use Value: V_th = 0.35–1.0 V ensures stable turn-on across battery discharge (2.8–3.6 V), maintaining sensor accuracy over full charge cycle.	Use Scenario: Eliminating mechanical switch bounce in ultra-low-power edge nodes using active pull-up/pull-down. IC Role / Device Role: Dual SSM3K37CT,L3F devices implementing glitch-free, rail-to-rail digital input conditioning. Use Value: C_iss = 12 pF and low gate leakage (<1 μA) prevent false triggering and extend battery life beyond 10 years in deep-sleep modes.

USB Port Protection

Smartphone Power Sequencing

Use Scenario: Isolating VBUS during hot-plug events to prevent backfeed into host circuitry.

IC Role / Device Role: Low-side load switch controlling 5 V USB power path with 1.5 V enable signal from PMIC.

Use Value: R_DS(ON) = 5.60 Ω max at 1.5 V ensures <100 mV drop at 20 mA fault current, preserving USB voltage compliance.

Use Scenario: Enabling/disabling subsystem rails (e.g., camera, display) during boot and sleep transitions.

IC Role / Device Role: Discrete N-MOSFET used as active-high controlled power gate driven by 1.8 V application processor GPIO.

Use Value: t_on/t_off = 18/36 ns allows precise timing control within 100 μs sequencing windows without external RC delays.

Wearable Sensor Biasing

IoT Button Debounce Circuit

Use Scenario: Providing regulated bias current to MEMS accelerometers and environmental sensors in hearables.

IC Role / Device Role: Constant-current source configured with source degeneration resistor and 2.5 V gate bias.

Use Value: V_th = 0.35–1.0 V ensures stable turn-on across battery discharge (2.8–3.6 V), maintaining sensor accuracy over full charge cycle.

Use Scenario: Eliminating mechanical switch bounce in ultra-low-power edge nodes using active pull-up/pull-down.

IC Role / Device Role: Dual SSM3K37CT,L3F devices implementing glitch-free, rail-to-rail digital input conditioning.

Use Value: C_iss = 12 pF and low gate leakage (<1 μA) prevent false triggering and extend battery life beyond 10 years in deep-sleep modes.

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel MOSFET switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
DMN1021UCB-7	R_DS(ON) = 4.5 Ω max @ V_GS = 1.5 V; higher C_iss = 20 pF; same CST3 package.	Better on-resistance but slower switching (t_off = 55 ns); less suitable for >5 MHz signal routing.	Prefer when lowest conduction loss dominates over switching speed - e.g., always-on bias networks.
AO3414	R_DS(ON) = 5.8 Ω max @ V_GS = 1.5 V; lower V_DSS = 16 V; SOT-23 package (larger footprint).	Not recommended for 20 V systems; requires PCB redesign due to different land pattern and thermal pad layout.	Select only if legacy SOT-23 footprint reuse is mandatory and 16 V rating suffices for target voltage rails.

Compared with DMN1021UCB-7 and AO3414, the SSM3K37CT,L3F offers optimal balance of 1.5 V drive capability, 20 V rating, and 18 ns turn-on time in the smallest standardized footprint - making it preferred for new designs prioritizing board area, battery voltage compatibility, and signal integrity.

Availability

SSM3K37CT,L3F is available at Aetrix Electronics and suitable for USB port protection, smartphone power sequencing, and wearable sensor biasing requiring stable component supply and long-term manufacturing continuity through April 2026.

Supply support for SSM3K37CT,L3F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Toshiba Electronic Devices & Storage Corporation designs and manufactures discrete semiconductors, power devices, and logic ICs with emphasis on efficiency, miniaturization, and reliability for consumer, industrial, and automotive markets.

The SSM3K37CT,L3F belongs to Toshiba's SSM series of ultra-small-signal MOSFETs, engineered specifically for low-voltage, high-density portable electronics where gate drive voltage headroom is limited and PCB real estate is at premium.

FAQ

What is the maximum continuous drain current for SSM3K37CT,L3F at 25°C ambient?

The SSM3K37CT,L3F has a DC drain current rating of 200 mA at T_a = 25°C when mounted on a standard FR4 board (10 mm × 10 mm × 1.0 mm, 100 mm² Cu pad). This value assumes no additional heatsinking and accounts for the device's 100 mW power dissipation limit and thermal resistance characteristics. Exceeding this current may cause junction temperature to exceed 150°C, risking reliability degradation.

Does SSM3K37CT,L3F support true 1.5 V logic-level gate drive?

Yes, the SSM3K37CT,L3F is explicitly characterized for operation at V_GS = 1.5 V, with R_DS(ON) guaranteed ≤ 5.60 Ω under that condition. Its V_th range (0.35–1.0 V) provides sufficient margin above 1.5 V to ensure full enhancement, making the SSM3K37CT,L3F suitable for direct drive from single-cell Li-ion batteries or low-voltage MCUs without level-shifting circuitry.

What is the thermal resistance from channel to ambient for SSM3K37CT,L3F?

Toshiba does not specify R_th(ch-a) directly for the SSM3K37CT,L3F, but provides PD = 100 mW under defined FR4 board conditions (10 mm × 10 mm × 1.0 mm, 100 mm² Cu pad). From this, effective R_th(ch-a) is approximately 150°C/W - derived from ΔT = (T_ch − T_a) = R_th × P_D, assuming T_ch = 150°C and T_a = 25°C. Actual thermal performance depends on PCB copper area and layer stackup.

Can SSM3K37CT,L3F be used in analog switch configurations?

Yes, the SSM3K37CT,L3F is qualified for analog switch applications per Toshiba's official documentation. Its low R_DS(ON) variation across V_DS (≤2.20 Ω at V_GS = 4.5 V), low Crss = 4.1 pF, and symmetrical on-resistance behavior support bidirectional signal routing in audio paths, sensor multiplexing, and data line isolation - provided V_DS remains within the 20 V rating and body diode conduction is managed.

Is SSM3K37CT,L3F RoHS compliant and lead-free?

Yes, the SSM3K37CT,L3F is RoHS compliant and lead-free, consistent with Toshiba's environmental policy and JEDEC standards for surface-mount discrete devices. The L3F suffix denotes tape-and-reel packaging with Pb-free terminations and halogen-free molding compound. Full compliance documentation, including substance declarations and test reports, is available through Toshiba's official product portal.

SSM3K37CT,L3F Specifications

Product attributes: Attribute value

Manufacturer:: Toshiba Semiconductor and Storage

Series:: U-MOSIII

Package/Case:: SC-101, SOT-883

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 20 V

Current - Continuous Drain (Id) @ 25°C:: 200mA (Ta)

Drive Voltage (Max Rds On, Min Rds On):: 1.5V, 4.5V

Rds On (Max) @ Id, Vgs:: 2.2Ohm @ 100mA, 4.5V

Vgs(th) (Max) @ Id:: 1V @ 1mA

Gate Charge (Qg) (Max) @ Vgs:: -

Vgs (Max):: ±10V

Input Capacitance (Ciss) (Max) @ Vds:: 12 pF @ 10 V

FET Feature:: -

Power Dissipation (Max):: 100mW (Ta)

Operating Temperature:: 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: CST3

SSM3K37CT,L3F FAQ

1.How can I place an order for SSM3K37CT,L3F through Aetrix?

Please submit a Request for Quotation (RFQ) for SSM3K37CT,L3F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SSM3K37CT,L3F reliable?

The price and inventory of SSM3K37CT,L3F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SSM3K37CT,L3F is usually 5 days.

3.What payment methods are accepted for SSM3K37CT,L3F?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SSM3K37CT,L3F transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SSM3K37CT,L3F?

SSM3K37CT,L3F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SSM3K37CT,L3F order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SSM3K37CT,L3F?

For technical support, including SSM3K37CT,L3F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SSM3K37CT,L3F requirements.

6.How does Aetrix verify that SSM3K37CT,L3F is sourced from the original manufacturer or authorized distributors?

All SSM3K37CT,L3F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SSM3K37CT,L3F meets industry standards.

7.What is the process for return or replacement of SSM3K37CT,L3F?

All SSM3K37CT,L3F units undergo pre-shipment inspection (PSI). If there is an issue with SSM3K37CT,L3F, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SSM3K37CT,L3F part is unused and in its original packaging.

Return procedure for SSM3K37CT,L3F:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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