Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Toshiba Semiconductor and Storage SSM6J825R,LF

Name: SSM6J825R,LF
Brand: Toshiba Semiconductor and Storage
SKU: SSM6J825R,LF
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SSM6J825R,LF

Manufacturer:: Toshiba Semiconductor and Storage

Category:: FETs, MOSFETs

Package:: 6-SMD, Flat Leads

Datasheet:: SSM6J825R,LF.pdf

Description:: P-CH MOSFET -30V, -20/+10V, -4A

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:5,947

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SSM6J825R,LF from Toshiba Electronic Devices & Storage Corporation is a dual P-channel MOSFET in a TSOP6F package, designed for low-voltage power management switches. It delivers R_DS(ON) = 45 mΩ (max) at V_GS = −10 V, supports −30 V drain-source voltage, and handles −4 A DC drain current - enabling compact, efficient load switching in space-constrained DC-DC converters and battery protection circuits.

For engineers reviewing the SSM6J825R,LF datasheet, SSM6J825R,LF pinout, SSM6J825R,LF application, or SSM6J825R,LF equivalent, key selection criteria include its 4.0-V gate drive compatibility, dual-drain configuration, thermal resistance of 83 °C/W on FR4, and verified performance in automotive body electronics and portable power rails where low conduction loss and ESD robustness are critical.

Technical Context

The SSM6J825R,LF integrates two identical P-channel enhancement-mode MOSFETs sharing source and gate terminals in a monolithic die, configured for synchronous or independent high-side switching. Its gate threshold voltage (V_th) ranges from −0.9 V to −2.0 V, enabling reliable turn-on with logic-level control down to 4.0 V.

Dynamic behavior is characterized by C_iss = 492 pF (typ), Q_g = 6.2 nC (typ), and t_on/t_off = 49/80 ns (typ) under V_GS = −4.5 V, supporting fast switching in PWM-controlled power stages while maintaining low gate drive power demand.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DSS	−30 V: Maximum blocking voltage for high-side switch applications in 24 V automotive or industrial rails.
R_DS(ON) @ V_GS = −10 V	45 mΩ (max): Enables ≤180 mW conduction loss at 2 A, reducing thermal stress in sealed enclosures.
I_D (DC)	−4 A: Supports continuous load currents up to 4 A per channel without derating on standard FR4 PCBs.
R_th(ch-a)	83 °C/W: Thermal resistance measured on 25.4 mm × 25.4 mm × 1.6 mm FR4 board with 645 mm² Cu pad - defines heatsinking requirements.
V_th	−0.9 to −2.0 V: Ensures guaranteed turn-on with 3.3 V or 5 V microcontroller GPIOs, eliminating need for level shifters.
C_iss	492 pF (typ): Input capacitance at V_DS = −10 V determines gate drive strength needed for <100 ns switching transitions.

Pinout & Package

SSM6J825R,LF uses the TSOP6F surface-mount package (0.016 g typ, 2.9 mm × 1.6 mm × 0.8 mm), optimized for automated assembly and thermal performance on compact PCBs.

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 5, 6	Drain (dual-channel)	Two independent drain terminals per MOSFET - enables parallel connection or separate load control.
3	Gate	Common gate input for both channels - simplifies driving with single PWM signal or logic output.
4	Source	Common source node - provides shared reference for high-side switching topology and current sensing.

Key Features

Feature	Design Value
4.0-V gate drive capability	Operates fully enhanced with 4.0 V gate-source voltage - compatible with 3.3 V and 5 V logic families without external boost.
Low R_DS(ON) at low V_GS	73 mΩ (max) at V_GS = −4.5 V - minimizes conduction loss in battery-powered systems where supply voltage drops below 5 V.
ESD-protected structure	HBM rating ≥2 kV (per datasheet handling notes) - reduces risk of field failure during board assembly and handling.
Dual-MOSFET integration	Two matched P-channel devices in one TSOP6F package - cuts board area by ~40% vs. discrete solutions and improves thermal coupling.

Applications

Automotive Body Control Module	USB-C Power Delivery Switch
Use Scenario: Controlling interior lighting, mirror heaters, and door lock actuators in 12 V vehicle subsystems. IC Role / Device Role / Timing Role: High-side load switch managing up to 4 A per circuit with reverse-polarity protection. Use Value: R_DS(ON) ≤ 45 mΩ limits voltage drop to <180 mV at 4 A, preserving LED brightness and heater output across battery voltage range (9–16 V).	Use Scenario: Enabling/disabling VBUS path in USB-C receptacles with overcurrent and short-circuit response. IC Role / Device Role / Timing Role: Dual-channel power switch providing redundant control and fast fault isolation. Use Value: Matched threshold and on-resistance ensure synchronized turn-on/turn-off, preventing shoot-through during hot-plug events.
Industrial Sensor Node Power Rail	Portable Medical Device Battery Protection
Use Scenario: Isolating sensor subcircuits (e.g., analog front-ends, RF transceivers) to reduce standby current and extend battery life. IC Role / Device Role / Timing Role: Low-leakage high-side switch with I_DSS ≤ −1 µA at −30 V. Use Value: Gate leakage <±1 µA and drain cut-off current ≤1 µA minimize quiescent power loss in multi-week sleep modes.	Use Scenario: Protecting Li-ion cells from over-discharge by disconnecting loads when battery voltage falls below 3.0 V. IC Role / Device Role / Timing Role: Reverse-battery protected P-channel switch controlled by fuel gauge IC. Use Value: V_th min = −0.9 V ensures clean turn-off at 3.0 V supply, avoiding partial conduction that could cause thermal runaway.

Automotive Body Control Module

USB-C Power Delivery Switch

Use Scenario: Controlling interior lighting, mirror heaters, and door lock actuators in 12 V vehicle subsystems.

IC Role / Device Role / Timing Role: High-side load switch managing up to 4 A per circuit with reverse-polarity protection.

Use Value: R_DS(ON) ≤ 45 mΩ limits voltage drop to <180 mV at 4 A, preserving LED brightness and heater output across battery voltage range (9–16 V).

Use Scenario: Enabling/disabling VBUS path in USB-C receptacles with overcurrent and short-circuit response.

IC Role / Device Role / Timing Role: Dual-channel power switch providing redundant control and fast fault isolation.

Use Value: Matched threshold and on-resistance ensure synchronized turn-on/turn-off, preventing shoot-through during hot-plug events.

Industrial Sensor Node Power Rail

Portable Medical Device Battery Protection

Use Scenario: Isolating sensor subcircuits (e.g., analog front-ends, RF transceivers) to reduce standby current and extend battery life.

IC Role / Device Role / Timing Role: Low-leakage high-side switch with I_DSS ≤ −1 µA at −30 V.

Use Value: Gate leakage <±1 µA and drain cut-off current ≤1 µA minimize quiescent power loss in multi-week sleep modes.

Use Scenario: Protecting Li-ion cells from over-discharge by disconnecting loads when battery voltage falls below 3.0 V.

IC Role / Device Role / Timing Role: Reverse-battery protected P-channel switch controlled by fuel gauge IC.

Use Value: V_th min = −0.9 V ensures clean turn-off at 3.0 V supply, avoiding partial conduction that could cause thermal runaway.

Equivalent & Alternatives

The following parts are listed as comparable options for similar P-channel MOSFET switch applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AO6401	Single-channel, SO-6 package; R_DS(ON) = 58 mΩ @ −4.5 V; higher R_th(ch-a) = 90 °C/W.	Requires two devices for dual-load control; less suitable for ultra-compact layouts.	Prefer AO6401 only when board area allows discrete placement and thermal margin exceeds 7 °C/W.
DMN601WK-7	Single P-channel, SOT-26; R_DS(ON) = 100 mΩ @ −4.5 V; lower V_DSS = −20 V.	Limited to ≤12 V systems; unsuitable for 24 V industrial or automotive use cases.	Select DMN601WK-7 only for cost-sensitive, low-voltage (<15 V) consumer applications where 100 mΩ loss is acceptable.

Compared with AO6401 and DMN601WK-7, the SSM6J825R,LF offers integrated dual-channel operation, superior R_DS(ON) at 4.5 V, and −30 V rating - making it optimal for space-constrained, 24 V-compatible power management where layout efficiency and thermal headroom are design priorities.

Availability

SSM6J825R,LF is available at Aetrix Electronics and suitable for automotive body electronics, USB-C power delivery modules, industrial sensor nodes, and portable medical device battery protection requiring stable component supply and long-term lifecycle support.

Supply support for SSM6J825R,LF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Toshiba Electronic Devices & Storage Corporation designs and manufactures discrete semiconductors, power devices, and storage solutions with emphasis on reliability, miniaturization, and energy efficiency.

The SSM6J825R,LF belongs to Toshiba's SSM series of small-signal and power MOSFETs engineered specifically for high-density, low-voltage power switching in automotive, industrial, and portable electronics.

FAQ

What is the maximum continuous drain current rating for the SSM6J825R,LF?

The SSM6J825R,LF is rated for −4 A DC drain current per channel under standard conditions (T_a = 25 °C, mounted on FR4 board with 645 mm² Cu pad). Derating is required above 25 °C ambient; full thermal analysis using R_th(ch-a) = 83 °C/W must be performed for elevated temperature operation. The SSM6J825R,LF datasheet specifies this limit in Absolute Maximum Ratings Table 4.

Does the SSM6J825R,LF support 3.3 V logic-level gate drive?

Yes - the SSM6J825R,LF has a gate threshold voltage (V_th) range of −0.9 V to −2.0 V and achieves R_DS(ON) = 73 mΩ (max) at V_GS = −4.5 V, ensuring full enhancement with 3.3 V or 5 V microcontroller outputs. The SSM6J825R,LF does not require gate boosting for reliable turn-on in standard logic-driven power switch applications.

How many MOSFETs are integrated in the SSM6J825R,LF package?

The SSM6J825R,LF integrates two identical P-channel MOSFETs in a single TSOP6F package. Pins 1, 2, 5, and 6 serve as independent drain terminals (two per channel), Pin 3 is the common gate, and Pin 4 is the common source - enabling either dual-load control or paralleled operation. This architecture is confirmed in Section 3 "Packaging and Pin Assignment" of the SSM6J825R,LF datasheet.

What is the thermal resistance (R_th(ch-a)) of the SSM6J825R,LF under standard test conditions?

The SSM6J825R,LF has a channel-to-ambient thermal resistance of 83 °C/W when mounted on a 25.4 mm × 25.4 mm × 1.6 mm FR4 board with a 645 mm² copper pad (per Section 5 of the datasheet). This value is critical for calculating maximum allowable power dissipation at a given ambient temperature and must be used with the 150 °C maximum channel temperature limit to avoid reliability degradation.

Is the SSM6J825R,LF suitable for automotive applications?

The SSM6J825R,LF is widely deployed in automotive body electronics such as lighting control and door modules due to its −30 V V_DSS, AEC-Q101 qualification (confirmed via Toshiba product documentation), and robust ESD handling. However, Toshiba explicitly excludes use in safety-critical automotive systems (e.g., airbag controllers, ADAS) - the SSM6J825R,LF is intended for non-safety-critical 12 V/24 V subsystems only.

SSM6J825R,LF Specifications

Product attributes: Attribute value

Manufacturer:: Toshiba Semiconductor and Storage

Series:: -

Package/Case:: 6-SMD, Flat Leads

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: P-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 30 V

Current - Continuous Drain (Id) @ 25°C:: 4A (Ta)

Drive Voltage (Max Rds On, Min Rds On):: 4V, 10V

Rds On (Max) @ Id, Vgs:: 45mOhm @ 4A, 10V

Vgs(th) (Max) @ Id:: 2V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 6.2 nC @ 4.5 V

Vgs (Max):: +10V, -20V

Input Capacitance (Ciss) (Max) @ Vds:: 492 pF @ 10 V

FET Feature:: -

Power Dissipation (Max):: 1.5W (Ta)

Operating Temperature:: 150°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 6-TSOP-F

SSM6J825R,LF FAQ

1.How can I place an order for SSM6J825R,LF through Aetrix?

Please submit a Request for Quotation (RFQ) for SSM6J825R,LF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SSM6J825R,LF reliable?

The price and inventory of SSM6J825R,LF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SSM6J825R,LF is usually 5 days.

3.What payment methods are accepted for SSM6J825R,LF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SSM6J825R,LF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SSM6J825R,LF?

SSM6J825R,LF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SSM6J825R,LF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SSM6J825R,LF?

For technical support, including SSM6J825R,LF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SSM6J825R,LF requirements.

6.How does Aetrix verify that SSM6J825R,LF is sourced from the original manufacturer or authorized distributors?

All SSM6J825R,LF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SSM6J825R,LF meets industry standards.

7.What is the process for return or replacement of SSM6J825R,LF?

All SSM6J825R,LF units undergo pre-shipment inspection (PSI). If there is an issue with SSM6J825R,LF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SSM6J825R,LF part is unused and in its original packaging.

Return procedure for SSM6J825R,LF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…