Toshiba Semiconductor and Storage SSM6K781G,LF
- Part No.:
- SSM6K781G,LF
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- FETs, MOSFETs
- Package:
- 6-UFBGA, WLCSP
- Datasheet:
-
SSM6K781G,LF.pdf
- Description:
- MOSFET N-CH 12V 7A 6WCSP6C
- Quantity:
- Payment:

- Shipping:

Inventory:569
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Product details
Overview
SSM6K781G,LF from Toshiba Electronic Devices is a silicon N-channel MOSFET in a 6-pin WCSP package, designed for low-voltage power management switches. It delivers RDS(ON) = 14.4 mΩ (typ.) at VGS = 4.5 V and ID = 1.5 A, supports 1.5-V gate drive capability, and operates with 12-V drain-source breakdown voltage - enabling compact, high-efficiency load switching in space-constrained portable electronics.
For engineers reviewing the SSM6K781G,LF datasheet, SSM6K781G,LF pinout, SSM6K781G,LF application, or SSM6K781G,LF equivalent, key selection criteria include its ultra-low on-resistance at 2.5 V gate drive, WCSP6C thermal performance on FR4 boards, and dual-drain configuration for parallel current handling in battery protection and USB power delivery circuits.
Technical Context
The SSM6K781G,LF integrates six discrete N-channel MOSFETs in a single WCSP6C die-three drains (A1/B1/C1), two sources (B2/C2), and one shared gate (A2)-enabling multi-path switching or redundancy in compact DC-DC and load-switching topologies. Its 1.5-V logic-compatible gate threshold allows direct interfacing with modern low-power microcontrollers and PMICs without level-shifting.
Thermal design relies on board-level dissipation: PD = 1.6 W (FR4, 4-layer, 1369 mm² Cu pad); channel temperature must remain ≤150 °C. The device exhibits pulsed drain current capability of 14 A (t ≤ 10 ms, duty ≤ 1%), supporting transient surge handling in hot-swap and eFuse applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDSS | 12 V - Maximum continuous drain-source blocking voltage for 3.3 V/5 V rail protection |
| RDS(ON) @ VGS=4.5 V | 14.4 mΩ (typ.) - Enables <100 mW conduction loss at 1.5 A, critical for battery runtime |
| RDS(ON) @ VGS=2.5 V | 17.9 mΩ (typ.) - Supports reliable turn-on from 2.5 V GPIOs or LDO outputs |
| ID (DC) | 7 A - Continuous current rating under thermal-limited board conditions |
| Qg | 5.4 nC (typ.) - Low gate charge enables fast switching with minimal driver strength |
| Ciss | 600 pF (typ.) - Input capacitance impacts gate drive loop stability and EMI filtering |
| Tch max | 150 °C - Channel temperature limit requiring thermal-aware PCB layout |
Pinout & Package
Package: WCSP6C (Wafer Chip Scale Package, 1.6 mm × 1.6 mm × 0.53 mm, 1.4 mg). Ultra-compact footprint optimized for high-density portable PCBs with minimal thermal resistance to board.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1 | Drain | Primary high-side switch node; electrically tied to B1 and C1 internally |
| A2 | Gate | Common gate input for all three MOSFET cells; requires ESD-safe handling |
| B1 | Drain | Secondary drain terminal; enables current sharing or layout routing flexibility |
| B2 | Source | Source connection for first MOSFET cell; referenced to system ground or load return |
| C1 | Drain | Third drain terminal; supports parallel configuration or fault-isolation paths |
| C2 | Source | Second source terminal; allows independent source routing or Kelvin sensing |
Key Features
| Feature | Design Value |
|---|---|
| 1.5-V gate drive compatibility | Enables direct control from low-voltage MCUs and PMICs without external level shifters |
| Ultra-low RDS(ON) at 2.5 V | 17.9 mΩ typ. ensures efficient operation even under weak gate drive conditions |
| Triple-drain architecture | Supports current sharing, redundancy, or flexible PCB routing in space-constrained layouts |
| ESD-sensitive WCSP construction | Requires anti-static handling per JEDEC JS-001; no integrated ESD protection diodes |
| Low Qg/Ciss ratio | 5.4 nC / 600 pF improves switching efficiency and reduces gate driver power loss |
Applications
| Smartphone Battery Protection | USB-C Power Delivery Switch |
|---|---|
Use Scenario: Isolating main battery from charging IC during overvoltage or short-circuit events. IC Role / Device Role / Timing Role: High-side load switch with fast turn-off (<38 ns off-time) and low on-resistance to minimize voltage drop. Use Value: 14.4 mΩ RDS(ON) limits voltage drop to <22 mV at 1.5 A, preserving battery gauge accuracy and system uptime. | Use Scenario: Enabling/disabling VBUS path between USB-C controller and downstream port. IC Role / Device Role / Timing Role: Bidirectional load switch controlled by 1.8 V/2.5 V GPIO; leverages triple-drain for current derating. Use Value: 1.5-V gate threshold ensures compatibility with USB-C controller I/O, while WCSP6C footprint saves >40% board area vs. SO-8 alternatives. |
| Wearable Device Power Sequencing | IoT Sensor Node Load Switch |
Use Scenario: Controlled power-up of RF transceiver and MCU subsystems to manage inrush current. IC Role / Device Role / Timing Role: Low-quiescent-current load switch with precise gate threshold (0.4–1.0 V) for sequencing timing. Use Value: Gate threshold range allows deterministic turn-on with 1.5 V LDO output, eliminating need for external bias resistors. | Use Scenario: Remote sensor node using coin-cell battery where standby leakage must be <1 µA. IC Role / Device Role / Timing Role: Always-on load switch with ultra-low IGSS (<0.1 µA) to preserve battery life over years. Use Value: Gate leakage ≤0.1 µA ensures <1% annual battery drain in deep-sleep mode, extending operational lifetime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS22915YZFT | Single-channel, 5.5-V max VDS, integrated charge pump; RDS(ON) = 28 mΩ @ 1.2 VIN | Designed for fixed 1.2–5.5 V input rails; lacks triple-drain flexibility and 12-V capability | Choose when integrated control logic and lower gate drive voltage are prioritized over voltage headroom and layout flexibility |
| DMN6040SSD-13 | SO-8 dual-N, 60-V VDSS, RDS(ON) = 40 mΩ @ 4.5 V; larger footprint and higher thermal resistance | Targeted at industrial 24 V systems; not optimized for sub-5 V portable power rails | Choose when higher voltage tolerance and through-hole/SMT compatibility outweigh size and low-VGS requirements |
Compared with TPS22915YZFT and DMN6040SSD-13, the SSM6K781G,LF uniquely combines 12-V rating, 1.5-V gate compatibility, and WCSP6C packaging - making it optimal for miniaturized, battery-powered systems requiring robust low-voltage switching without sacrificing voltage margin or board area.
Availability
SSM6K781G,LF is available at Aetrix Electronics and suitable for smartphone battery protection, USB-C power delivery switches, wearable power sequencing, and IoT sensor node load switching requiring stable component supply across high-mix, low-volume production runs.
Supply support for SSM6K781G,LF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs and manufactures discrete semiconductors, power devices, and logic ICs with emphasis on energy efficiency, miniaturization, and reliability for consumer, industrial, and automotive markets.
The SSM6K781G,LF belongs to Toshiba's WCSP-series low-voltage N-channel MOSFET product line, engineered specifically for space-constrained portable electronics requiring high current density, low gate-threshold operation, and board-level thermal performance.
FAQ
What is the maximum continuous drain current for the SSM6K781G,LF?
The SSM6K781G,LF supports a continuous drain current (ID) of 7 A under specified thermal conditions: mounted on a 4-layer FR4 board (40 mm × 40 mm × 1.6 mm) with 1369 mm² copper pad area. This rating assumes channel temperature remains ≤150 °C; actual usable current depends on PCB layout and ambient temperature.
Does the SSM6K781G,LF have integrated ESD protection?
No, the SSM6K781G,LF does not include integrated ESD protection diodes. As stated in the datasheet, it is sensitive to electrostatic discharge, and proper anti-static handling - including grounded workstations, ESD-safe soldering irons, and operator grounding - is mandatory during assembly and testing of the SSM6K781G,LF.
Can the SSM6K781G,LF be driven directly by a 1.8 V GPIO?
Yes, the SSM6K781G,LF features a gate threshold voltage (Vth) range of 0.4–1.0 V, and its RDS(ON) is characterized down to VGS = 1.8 V (24.7 mΩ typ.). A 1.8 V GPIO can reliably turn on the SSM6K781G,LF with acceptable on-resistance, though performance improves at ≥2.5 V due to lower RDS(ON).
What is the thermal resistance from channel to ambient for the SSM6K781G,LF?
The datasheet does not specify a fixed Rth(ch-a) value for the SSM6K781G,LF because it varies significantly with PCB construction. For the reference 4-layer FR4 board (40 mm × 40 mm × 1.6 mm, 1369 mm² Cu pad), power dissipation is rated at 1.6 W - implying an effective Rth(ch-a) ≈ 94 °C/W (calculated from ΔT = 150 °C − 25 °C = 125 °C; 125 °C ÷ 1.6 W).
How are the three drain terminals (A1, B1, C1) configured internally in the SSM6K781G,LF?
The three drain terminals A1, B1, and C1 in the SSM6K781G,LF are electrically common and internally connected to the same silicon die region. They are provided for layout flexibility - enabling current sharing, reduced trace inductance, or routing around obstacles - but do not represent independent MOSFETs; all share the same gate (A2) and channel characteristics.
SSM6K781G,LF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- U-MOSVII-H
- Package/Case:
- 6-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 12 V
- Current - Continuous Drain (Id) @ 25°C:
- 7A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 1.5V, 4.5V
- Rds On (Max) @ Id, Vgs:
- 18mOhm @ 1.5A, 4.5V
- Vgs(th) (Max) @ Id:
- 1V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 5.4 nC @ 4.5 V
- Vgs (Max):
- ±8V
- Input Capacitance (Ciss) (Max) @ Vds:
- 600 pF @ 6 V
- FET Feature:
- -
- Power Dissipation (Max):
- 1.6W (Ta)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WCSPC (1.5x1.0)
SSM6K781G,LF FAQ
1.How can I place an order for SSM6K781G,LF through Aetrix?
Please submit a Request for Quotation (RFQ) for SSM6K781G,LF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SSM6K781G,LF reliable?
The price and inventory of SSM6K781G,LF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SSM6K781G,LF is usually 5 days.
3.What payment methods are accepted for SSM6K781G,LF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SSM6K781G,LF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SSM6K781G,LF?
SSM6K781G,LF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SSM6K781G,LF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SSM6K781G,LF?
For technical support, including SSM6K781G,LF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SSM6K781G,LF requirements.
6.How does Aetrix verify that SSM6K781G,LF is sourced from the original manufacturer or authorized distributors?
All SSM6K781G,LF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SSM6K781G,LF meets industry standards.
7.What is the process for return or replacement of SSM6K781G,LF?
All SSM6K781G,LF units undergo pre-shipment inspection (PSI). If there is an issue with SSM6K781G,LF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SSM6K781G,LF part is unused and in its original packaging.
Return procedure for SSM6K781G,LF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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