STMicroelectronics STB6N80K5

Overview

STB6N80K5 from STMicroelectronics is a high-voltage N-channel Power MOSFET based on MDmesh K5 vertical structure technology, rated for 800 V V_DS, 1.6 Ω max R_DS(on) at 10 V V_GS, and 4.5 A continuous drain current at T_C = 25 °C. It delivers ultra-low gate charge (13 nC), 100% avalanche-tested ruggedness, and Zener-protected gate, targeting high-efficiency flyback and resonant converters in industrial power supplies.

For engineers reviewing the STB6N80K5 datasheet, STB6N80K5 pinout, STB6N80K5 application, or STB6N80K5 equivalent, key selection criteria include its 800 V breakdown voltage, 1.3 Ω typical R_DS(on), 13 nC total gate charge, 1.47 °C/W junction-to-case thermal resistance, and DPAK (TO-252) package compatibility with standard FR-4 PCB layouts.

Technical Context

This device implements ST's MDmesh K5 proprietary vertical superjunction architecture to minimize conduction and switching losses simultaneously. Its 270 pF input capacitance and 0.7 pF reverse transfer capacitance enable fast, low-noise switching under hard-switching conditions up to 400 V bus voltage.

The integrated source-drain diode features 1.5 V forward voltage at 4.5 A and 280 ns reverse recovery time at 25 °C, supporting quasi-resonant operation without external snubbing. Avalanche capability is validated to 1.5 A repetitive and 85 mJ single-pulse energy, ensuring robustness in unclamped inductive switching.

Key Specifications

Pinout & Package

STB6N80K5 is housed in a DPAK (TO-252) package with exposed drain tab for thermal and electrical connection. The package complies with ECOPACK environmental standards and mounts directly to copper pour for optimal thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Compared with STP6N80K5, STB6N80K5 offers 32% lower R_thJA and SMT compatibility; compared with IPP60R190C7, it provides 200 V higher blocking voltage and 30% lower gate charge-critical for 800 V universal-input designs.

Availability

STB6N80K5 is available at Aetrix Electronics and suitable for industrial flyback SMPS, QR resonant converters, AC-DC front-end PFC, and high-voltage LED drivers requiring stable component supply across multi-year production cycles.

Supply support for STB6N80K5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.

STB6N80K5 belongs to the MDmesh K5 high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-power-density offline SMPS topologies operating at 600–1000 V DC bus levels.

FAQ

What is the maximum safe operating temperature for STB6N80K5?

The STB6N80K5 has an operating junction temperature range of –55 °C to 150 °C. At T_J = 150 °C, the R_DS(on) increases to ~2.2 Ω (2.5× room-temperature value), and the continuous drain current derates to 2.8 A. Thermal design must ensure junction temperature remains below 150 °C under worst-case ambient and power dissipation conditions.

Does STB6N80K5 require external gate protection?

No. STB6N80K5 integrates a bidirectional Zener diode between gate and source, rated for ±30 V, eliminating the need for external gate protection components. This simplifies layout, reduces BOM count, and enhances reliability against ESD and transient overvoltage events during assembly and operation.

Can STB6N80K5 replace STD6N80K5 in existing designs?

Yes - STB6N80K5 shares identical electrical specifications, pinout, package (DPAK), and thermal characteristics with STD6N80K5. Both are manufactured using the same MDmesh K5 die and meet the same avalanche, dv/dt, and gate charge specifications per DS9676 Rev 5.

What is the recommended PCB footprint for STB6N80K5?

The recommended footprint follows ST's FP_0068772_34 layout for DPAK (TO-252) type E: 5.2 mm × 6.6 mm pad for the drain tab, 0.9 mm × 1.5 mm pads for Gate (Pin 1) and Source (Pin 3), with ≥1 in² copper pour connected to the tab via multiple thermal vias (≥8 × 0.3 mm) to inner ground planes.