STMicroelectronics STB75NF75LT4
- Part No.:
- STB75NF75LT4
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- TO-263-3, D2PAK (2 Leads + Tab), TO-263AB
- Datasheet:
-
STB75NF75LT4.pdf
- Description:
- MOSFET N-CH 75V 75A D2PAK
- Quantity:
- Payment:

- Shipping:

Inventory:927
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STB75NF75LT4 from STMicroelectronics is an N-channel enhancement-mode Power MOSFET in D²PAK (TO-263) package, rated for 75V VDS, 75A continuous drain current at TC = 25°C, and RDS(on) ≤ 0.011Ω at VGS = 10V. It features 100% avalanche tested ruggedness, exceptional dv/dt capability, and low gate charge (Qg = 75 nC), making it suitable as a primary switch in high-frequency telecom DC-DC converters.
For engineers reviewing the STB75NF75LT4 datasheet, STB75NF75LT4 pinout, STB75NF75LT4 application, or STB75NF75LT4 equivalent, key selection criteria include its 0.009Ω typical RDS(on), 300A pulsed drain current capability, 680 mJ single-pulse avalanche energy, and D²PAK thermal performance with RthJC = 0.5°C/W - critical for high-efficiency power stage design.
Technical Context
This STripFET™ II device uses a planar vertical structure optimized to minimize input capacitance (Ciss = 4300 pF) and gate charge, enabling fast switching (tr = 155 ns, tf = 60 ns) with low drive loss. Its source-drain diode supports synchronous rectification with trr = 120 ns and Qrr = 500 nC at 150°C junction temperature.
The MOSFET operates across –55°C to +175°C junction range and is fully characterized for unclamped inductive switching. Its safe operating area (SOA) is defined up to 300A pulsed current with derating above 25°C case temperature, and it meets JEDEC JESD97 for lead-free ECOPACK® compliance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 75 V - Maximum blocking voltage in hard-switched topologies without derating |
| RDS(on) (typ) | 0.009 Ω at VGS = 10 V - Enables <1 W conduction loss at 37.5 A DC |
| ID (cont) | 75 A at TC = 25°C - Supports high-current primary-side switching in 1–3 kW telecom PSUs |
| Qg | 75 nC - Reduces gate driver power demand and enables >500 kHz operation with standard drivers |
| EAS | 680 mJ - Withstands single unclamped inductive energy spikes in flyback/LLC designs |
| RthJC | 0.5 °C/W - Allows direct heatsink mounting for efficient thermal management in compact layouts |
| dv/dt rating | 10 V/ns - Ensures robustness against parasitic turn-on in high-dV/dt environments |
Pinout & Package
Package: D²PAK (TO-263), surface-mount, single-ended heatsink-compatible outline with exposed drain pad for thermal and electrical connection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Drain (tab) | Main power output terminal | Exposed copper pad - electrically connected to drain; must be soldered to PCB copper pour for thermal and current conduction |
| Source | Power return path | Low-inductance source connection; forms common reference for gate drive and current sensing |
| Gate | Control input | High-impedance MOS control node requiring <75 nC charge for full enhancement; sensitive to ESD |
Key Features
| Feature | Design Value |
|---|---|
| STripFET™ II process | Reduces gate charge by ~30% vs. first-gen STripFET, lowering driver losses and EMI in high-frequency SMPS |
| 100% avalanche tested | Guarantees ruggedness under transient overvoltage conditions without external snubbers in flyback/forward converters |
| Low threshold voltage | VGS(th) = 1–2.5 V - Enables direct drive from 3.3 V or 5 V logic controllers without level-shifting |
| ECOPACK® compliant | Lead-free second-level interconnect per JEDEC JESD97 - qualified for RoHS-compliant industrial and telecom manufacturing |
| High dv/dt immunity | 10 V/ns rating - prevents false turn-on during fast voltage transitions in half-bridge configurations |
Applications
| Telecom DC-DC Converters | Server VRMs |
|---|---|
Use Scenario: Primary-side switch in 48 V input, 12 V/50 A isolated forward converter for telecom shelf power supplies. IC Role / Device Role / Timing Role: High-side main switch operating at 200–500 kHz with synchronous rectification on secondary side. Use Value: 0.009 Ω RDS(on) reduces conduction loss by >40% vs. comparable 12 mΩ devices, improving full-load efficiency to >94%. | Use Scenario: High-current phase-leg switch in multiphase buck converter for CPU core voltage regulation (1.0–1.2 V @ 100+ A). IC Role / Device Role / Timing Role: Low-side switch handling high di/dt currents with fast turn-off (tf = 60 ns) to minimize shoot-through risk. Use Value: 300 A pulsed current rating supports peak load transients without SOA violation, ensuring stable operation during CPU burst loads. |
| Industrial Motor Drives | UPS Inverters |
Use Scenario: Half-bridge leg in 24–48 V BLDC motor controller for HVAC blowers and pumps. IC Role / Device Role / Timing Role: Fast-switching N-channel switch paired with bootstrap gate driver for 10–20 kHz PWM commutation. Use Value: 120 ns reverse recovery time (trr) of integrated body diode minimizes switching loss during freewheeling, reducing heatsink size by 30%. | Use Scenario: Output H-bridge switch in online double-conversion UPS delivering 230 V AC from 380 V DC bus. IC Role / Device Role / Timing Role: Hard-switched inverter switch handling 50/60 Hz fundamental plus harmonic content up to 3 kHz. Use Value: 680 mJ avalanche energy rating allows safe operation during grid fault events without external clamping circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRFB7545PBF | RDS(on) = 0.0085 Ω (typ), Qg = 82 nC, TO-220AB package | Lacks D²PAK thermal interface; higher RthJA limits power density in SMT layouts | Select when through-hole assembly or lower RDS(on) is prioritized over board space and thermal performance |
| IXTH75N10L2 | RDS(on) = 0.0105 Ω (typ), Qg = 65 nC, TO-247 package | Higher RthJC (0.65°C/W) and larger footprint reduce thermal efficiency in dense PCBs | Prefer for legacy TO-247 socket compatibility where D²PAK rework is constrained |
Compared with IRFB7545PBF and IXTH75N10L2, STB75NF75LT4 delivers superior thermal resistance (0.5°C/W), surface-mount scalability, and tighter gate charge distribution - making it optimal for high-power-density telecom and server power stages where layout area and thermal headroom are critical.
Availability
STB75NF75LT4 is available at Aetrix Electronics and suitable for telecom power supplies, server VRMs, and industrial motor drives requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for STB75NF75LT4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.
The STB75NF75LT4 belongs to ST's STripFET™ II Power MOSFET product line, engineered specifically for high-frequency, high-efficiency DC-DC conversion in telecom and computing infrastructure where low RDS(on), low Qg, and avalanche ruggedness are mandatory.
FAQ
What is the maximum continuous drain current at 100°C case temperature?
The STB75NF75LT4 supports 70 A continuous drain current at TC = 100°C, as specified in Table 2 of the datasheet. This derated value reflects thermal limitations of the D²PAK package and must be used in thermal design calculations for sustained operation above ambient temperatures.
Does this MOSFET require a gate resistor for stability in hard-switched applications?
Yes - a gate resistor (typically 4.7 Ω, as used in the datasheet's switching test circuit) is recommended to dampen ringing, control dV/dt, and prevent oscillation during turn-on/turn-off. The device's low input capacitance (4300 pF) makes it susceptible to gate drive loop resonance without proper damping.
Can the integrated body diode be used for synchronous rectification?
No - the body diode is not optimized for synchronous rectification due to relatively high VSD (1.3 V at 75 A) and moderate trr (120 ns). For synchronous designs, an external Schottky or MOSFET-based synchronous rectifier is required to achieve high efficiency.
Is the STB75NF75LT4 suitable for automotive applications?
No - this part is not qualified to AEC-Q101 and lacks automotive-grade screening, temperature range extension beyond 175°C, or guaranteed PPAP documentation. ST offers dedicated automotive variants (e.g., STL75N75HF6) for such use cases.
STB75NF75LT4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STripFET™ II
- Package/Case:
- TO-263-3, D2PAK (2 Leads + Tab), TO-263AB
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 75 V
- Current - Continuous Drain (Id) @ 25°C:
- 75A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 5V, 10V
- Rds On (Max) @ Id, Vgs:
- 11mOhm @ 37.5A, 10V
- Vgs(th) (Max) @ Id:
- 2.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 90 nC @ 5 V
- Vgs (Max):
- ±15V
- Input Capacitance (Ciss) (Max) @ Vds:
- 4300 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 300W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- D2PAK
STB75NF75LT4 FAQ
1.How can I place an order for STB75NF75LT4 through Aetrix?
Please submit a Request for Quotation (RFQ) for STB75NF75LT4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STB75NF75LT4 reliable?
The price and inventory of STB75NF75LT4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STB75NF75LT4 is usually 5 days.
3.What payment methods are accepted for STB75NF75LT4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STB75NF75LT4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STB75NF75LT4?
STB75NF75LT4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STB75NF75LT4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STB75NF75LT4?
For technical support, including STB75NF75LT4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STB75NF75LT4 requirements.
6.How does Aetrix verify that STB75NF75LT4 is sourced from the original manufacturer or authorized distributors?
All STB75NF75LT4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STB75NF75LT4 meets industry standards.
7.What is the process for return or replacement of STB75NF75LT4?
All STB75NF75LT4 units undergo pre-shipment inspection (PSI). If there is an issue with STB75NF75LT4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STB75NF75LT4 part is unused and in its original packaging.
Return procedure for STB75NF75LT4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STB75NF75LT4 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

