Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

STMicroelectronics STD15N60DM6

Name: STD15N60DM6
Brand: STMicroelectronics
SKU: STD15N60DM6
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: STD15N60DM6

Manufacturer:: STMicroelectronics

Category:: FETs, MOSFETs

Package:: TO-252-3, DPAK (2 Leads + Tab), SC-63

Datasheet:: STD15N60DM6.pdf

Description:: MOSFET N-CH 600V 12A DPAK

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,483

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

STD15N60DM6 from STMicroelectronics is a high-voltage N-channel MDmesh DM6 Power MOSFET in DPAK (TO-252) package, rated for 600 V V_DS, 286 mΩ typ. R_DS(on) at V_GS = 10 V and 6 A, with 12 A continuous drain current at T_C = 25 °C. It integrates a fast-recovery body diode (t_rr = 85 ns, Q_rr = 0.268 µC), low gate charge (Q_g = 15.3 nC), and 100% avalanche tested ruggedness - deployed in ZVS phase-shift converters and high-efficiency bridge topologies.

For engineers reviewing the STD15N60DM6 datasheet, STD15N60DM6 pinout, STD15N60DM6 application, or STD15N60DM6 equivalent, key selection criteria include its dv/dt ruggedness (100 V/ns), low C_oss,eq (100 pF), Zener-protected gate, and thermal resistance (R_thj-case = 1.14 °C/W), critical for high-reliability SMPS and industrial motor drives.

Technical Context

This device belongs to ST's MDmesh DM6 series, engineered to minimize switching losses via ultra-low Q_rr and t_rr while maintaining robust hard-switching capability. Its optimized cell structure delivers 338 mΩ max. R_DS(on) at 12 A and improves R_DS(on)/area over prior MDmesh generations.

The integrated fast-recovery body diode supports synchronous rectification and resonant topologies without external diodes. Gate drive compatibility is ensured by V_GS(th) = 3.25–4.75 V and low input capacitance (C_iss = 607 pF), enabling clean turn-on/turn-off with standard 10 V gate drivers.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	600 V - Withstands DC bus voltages up to 480 V in ZVS converters with margin
R_DS(on) max.	338 mΩ at V_GS = 10 V, I_D = 6 A - Enables <1.5 W conduction loss at 12 A in TO-252 package
Q_g	15.3 nC - Reduces gate driver power and enables >100 kHz switching with low EMI
t_rr	85 ns at T_J = 25 °C - Limits reverse recovery spike and cross-conduction loss in half-bridge legs
E_AS	240 mJ - Supports unclamped inductive switching without failure under transient overload
dv/dt ruggedness	100 V/ns - Prevents spurious turn-on during high-speed voltage transients in bridge configurations
R_thj-case	1.14 °C/W - Allows 110 W dissipation at T_C = 25 °C; requires ≥1-in² 2 oz Cu PCB for full rating

Pinout & Package

DPAK (TO-252) package with exposed drain tab (pin 2) for thermal and electrical connection; surface-mount, single-ended lead configuration. Tab is electrically connected to drain (D), enabling direct heatsinking without isolation.

Pin/Terminal	Circuit Role	Design Meaning
1 (G)	Gate	Control terminal; accepts 0–10 V logic-level drive; Zener-protected against ±25 V transients
2 (D, Tab)	Drain / Thermal Pad	Main high-side power node and primary thermal path; must be soldered to large copper area for R_thj-pcb = 50 °C/W
3 (S)	Source	Reference node for gate drive and current sensing; connects to low-side switch or ground return path

Key Features

Feature	Design Value
Fast-recovery body diode	t_rr = 85 ns and Q_rr = 0.268 µC enable efficient operation in hard- and soft-switching topologies without external diode
Low R_DS(on) per area	286 mΩ typ. at 12 A in DPAK - 22% lower on-resistance than predecessor MDmesh DM2 in same footprint
100% avalanche tested	Each unit validated for single-pulse E_AS = 240 mJ - ensures reliability in inductive load switching and fault conditions
Zener-protected gate	Integrated gate oxide protection clamps V_GS to ±25 V - eliminates need for external gate Zener in most SMPS designs
Extremely high dv/dt ruggedness	Rated 100 V/ns - suppresses false triggering in high-side bridge positions with fast-rising V_DS

Applications

Industrial SMPS

Server PSU

Use Scenario: Primary-side switch in 1–3 kW telecom rectifiers operating at 100–300 kHz with LLC resonance.

IC Role / Device Role / Timing Role: High-voltage switching element in half-bridge topology; handles 400 V DC bus with ZVS transitions.

Use Value: Low Q_rr and t_rr reduce dead-time losses and EMI; R_thj-case = 1.14 °C/W enables compact heatsink design.

Use Scenario: Active clamp forward or phase-shifted full-bridge converter in 80 PLUS Titanium PSUs.

IC Role / Device Role / Timing Role: Main switching FET in high-efficiency isolated DC-DC stage; synchronized with controller for precise timing control.

Use Value: 100 V/ns dv/dt rating prevents shoot-through during rapid V_DS transitions; Zener gate protection simplifies gate driver BOM.

Motor Drive Inverter

EV Onboard Charger

Use Scenario: 3-phase inverter stage in HVAC compressors and industrial pumps (200–400 V bus).

IC Role / Device Role / Timing Role: Low-side switching device with integrated body diode conducting freewheeling current during PWM off-time.

Use Value: Fast-recovery diode (t_rr = 85 ns) minimizes voltage overshoot and snubber losses during commutation.

Use Scenario: PFC boost switch and DC-DC isolation switch in bidirectional OBC modules (600 V class).

IC Role / Device Role / Timing Role: High-reliability power switch handling repeated avalanche stress during AC line surges and regenerative braking events.

Use Value: 240 mJ E_AS rating ensures survival under unclamped inductive faults common in automotive charging cycles.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
STP15N60DM6	TO-220 package; identical die, higher R_thj-case = 0.45 °C/W; no exposed tab	Better for forced-air cooled discrete designs; unsuitable for space-constrained SMT layouts	Select when thermal interface allows bolt-down heatsink and board real estate permits through-hole mounting
IPP60R190C7	600 V, 190 mΩ typ., TO-220FP; CoolMOS C7 technology; higher Q_g = 22 nC	Lower conduction loss but slower switching; requires stronger gate driver due to higher capacitance	Prefer for lower-frequency (<65 kHz), high-current applications where R_DS(on) dominates efficiency

Compared with STP15N60DM6 and IPP60R190C7, STD15N60DM6 offers optimal balance of SMT integration, thermal performance in constrained spaces, and fast switching for >100 kHz topologies - making it ideal for high-density server PSUs and compact industrial inverters.

Availability

STD15N60DM6 is available at Aetrix Electronics and suitable for industrial SMPS, server power supplies, motor drive inverters, and EV onboard chargers requiring stable component supply and long-term lifecycle support.

Supply support for STD15N60DM6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, microcontrollers, and automotive-grade ICs.

This device belongs to the MDmesh DM6 Power MOSFET product line, designed specifically for high-efficiency, high-frequency switching power conversion in industrial, computing, and renewable energy systems.

FAQ

What is the maximum continuous drain current at 100 °C case temperature?

The STD15N60DM6 supports 7.3 A continuous drain current at T_C = 100 °C, as specified in Table 1 of DS13337. This derating reflects thermal limits of the DPAK package and must be verified against actual PCB layout and ambient conditions using R_thj-pcb = 50 °C/W for 1-in² FR-4 board.

Does the body diode require external snubbing in hard-switched half-bridge applications?

No external snubber is required under typical conditions due to the device's extremely high dv/dt ruggedness (100 V/ns) and low Q_rr (0.268 µC). However, layout optimization - including minimized source inductance and symmetric gate routing - remains essential to avoid oscillation during diode reverse recovery.

Can STD15N60DM6 replace older MDmesh DM2 devices without circuit modification?

Yes - it is a direct drop-in replacement for STD15N60DM2 in DPAK, offering improved R_DS(on) (−22%), lower Q_rr, and enhanced avalanche ruggedness. No changes to gate drive, layout, or biasing are needed, though efficiency gains may allow reduction in heatsink size.

Is the drain tab electrically isolated from the PCB copper pour?

No - the exposed drain tab (pin 2) is electrically connected to the drain terminal and must be soldered directly to a copper pour tied to the high-voltage DC bus. Electrical isolation requires use of insulating thermal pads or dedicated isolated heatsinks; standard thermal vias are not sufficient for safety isolation.

STD15N60DM6 Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: MDmesh™

Package/Case:: TO-252-3, DPAK (2 Leads + Tab), SC-63

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 600 V

Current - Continuous Drain (Id) @ 25°C:: 12A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: -

Rds On (Max) @ Id, Vgs:: 338mOhm @ 6A, 10V

Vgs(th) (Max) @ Id:: 4.75V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 15.3 nC @ 10 V

Vgs (Max):: ±25V

Input Capacitance (Ciss) (Max) @ Vds:: 607 pF @ 100 V

FET Feature:: -

Power Dissipation (Max):: 110W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: TO-252 (DPAK)

STD15N60DM6 FAQ

1.How can I place an order for STD15N60DM6 through Aetrix?

Please submit a Request for Quotation (RFQ) for STD15N60DM6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STD15N60DM6 reliable?

The price and inventory of STD15N60DM6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STD15N60DM6 is usually 5 days.

3.What payment methods are accepted for STD15N60DM6?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STD15N60DM6 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STD15N60DM6?

STD15N60DM6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STD15N60DM6 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STD15N60DM6?

For technical support, including STD15N60DM6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STD15N60DM6 requirements.

6.How does Aetrix verify that STD15N60DM6 is sourced from the original manufacturer or authorized distributors?

All STD15N60DM6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STD15N60DM6 meets industry standards.

7.What is the process for return or replacement of STD15N60DM6?

All STD15N60DM6 units undergo pre-shipment inspection (PSI). If there is an issue with STD15N60DM6, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STD15N60DM6 part is unused and in its original packaging.

Return procedure for STD15N60DM6:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…