STMicroelectronics STD7ANM60N
- Part No.:
- STD7ANM60N
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- TO-252-3, DPAK (2 Leads + Tab), SC-63
- Datasheet:
-
STD7ANM60N.pdf
- Description:
- MOSFET N-CH 600V 5A DPAK
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STD7ANM60N from STMicroelectronics is an AEC-Q101 qualified N-channel 600 V, 900 mΩ (max), 5 A Power MOSFET in DPAK (TO-252) package, built on MDmesh™ II vertical strip technology. It delivers ultra-low gate charge (14 nC) and input capacitance (363 pF), enabling high-efficiency hard-switching and resonant topologies in automotive and industrial power converters.
For engineers reviewing the STD7ANM60N datasheet, STD7ANM60N pinout, STD7ANM60N application, or STD7ANM60N equivalent, this device is selected for high-voltage DC-DC conversion, motor drive half-bridges, and offline SMPS where avalanche ruggedness (119 mJ EAS), low RDS(on), and fast switching (tr = 10 ns) are critical design requirements.
Technical Context
This MDmesh II MOSFET employs a proprietary vertical stripe cell structure to minimize conduction and switching losses simultaneously. Its 1.1 pF reverse transfer capacitance (Crss) and 5.4 Ω intrinsic gate resistance enable precise gate drive control and reduced Miller-induced shoot-through risk in bridge configurations.
The device integrates a robust body diode with 213 ns reverse recovery time (Tj = 25 °C) and 1.5 µC Qrr, optimized for inductive load switching. Its 15 V/ns dv/dt immunity and 100% avalanche testing ensure reliability under unclamped inductive switching stress.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 600 V - supports 400 V AC mains-derived bus voltages with 50% safety margin |
| RDS(on) max | 900 mΩ at VGS = 10 V, ID = 2.5 A - enables <1.1 W conduction loss at 3.5 A continuous |
| Qg | 14 nC - reduces gate driver power demand and allows use of low-power drivers like STGAP2S |
| EAS | 119 mJ - withstands repetitive unclamped inductive energy without failure |
| RthJC | 2.78 °C/W - permits 45 W dissipation with ≤125 °C case temperature rise above ambient |
| Ciss | 363 pF - lowers capacitive loading on gate driver, improving switching speed stability |
| tr/tf | 10 ns / 12 ns - supports >500 kHz switching in LLC and phase-shifted full-bridge designs |
Pinout & Package
DPAK (TO-252) package: surface-mount, single-ended heatsink interface via exposed drain tab; 3-terminal configuration with standardized footprint per Figure 20 (DS9116 Rev 4, p.12).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Tab (Drain) | Main current path output / thermal interface | Electrically connected to Drain; soldered to PCB copper pour for thermal conduction and low-inductance return path |
| Pin 1 (Gate) | Control terminal | Receives voltage-controlled signal; 5.4 Ω intrinsic resistance limits ringing but requires careful layout to avoid oscillation |
| Pin 3 (Source) | Reference node / current return | Serves as local ground reference for gate drive; must be routed with minimal inductance to prevent VGS instability during dI/dt events |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q101 qualification | Validated for automotive powertrain and chassis applications per stress test requirements including HTOL, TC, and UHAST |
| 100% avalanche tested | Each unit subjected to single-pulse unclamped inductive switching at IAR = 2 A, ensuring guaranteed ruggedness in real-world fault conditions |
| Low Crss (1.1 pF) | Minimizes Miller feedback, enabling stable operation with moderate gate resistors (e.g., 10 Ω) in high-dv/dt environments |
| MDmesh II architecture | Vertical trench + strip layout achieves 30% lower RDS(on) × Qg figure-of-merit vs. first-gen MDmesh devices |
| Low gate input resistance (5.4 Ω) | Reduces need for external gate resistor damping while maintaining controllable turn-on/turn-off timing |
Applications
| Automotive On-Board Charger (OBC) | Industrial Motor Drive Half-Bridge |
|---|---|
|
Use Scenario: High-frequency interleaved PFC stage in 3.3 kW OBC converting 230 V AC to 400 V DC bus. IC Role / Device Role / Timing Role: Fast-switching N-channel switch in boost converter topology operating at 100–150 kHz. Use Value: 14 nC Qg and 10 ns tr reduce switching losses by 22% vs. legacy 650 V MOSFETs, enabling higher efficiency at full load. |
Use Scenario: Upper-leg switch in 3-phase inverter driving 1.5 kW BLDC motor in HVAC compressor. IC Role / Device Role / Timing Role: High-side switching element in 600 V DC bus inverter with 12 kHz PWM carrier. Use Value: 119 mJ EAS rating ensures survival during motor stall or short-circuit events without external snubbers. |
| Telecom Rectifier Module | LED Streetlight Driver |
|
Use Scenario: Active clamp forward converter in 48 V telecom rectifier handling 1200 W output. IC Role / Device Role / Timing Role: Main switch clamped by auxiliary winding; operates with zero-voltage switching (ZVS) assist. Use Value: 363 pF Ciss and 24.6 pF Coss support reliable ZVS across 20–100% load range, reducing EMI and transformer stress. |
Use Scenario: Buck-boost LED driver powering 120 W streetlight array from 277 V AC line. IC Role / Device Role / Timing Role: Primary-side switch in isolated flyback with primary-side regulation. Use Value: 600 V VDS rating accommodates 277 V AC peak (392 V) plus surge margin; 15 V/ns dv/dt immunity prevents false turn-on during line transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STP7NM60 | 600 V, 1.2 Ω RDS(on), 7 A, TO-220; no AEC-Q101, higher Qg (25 nC) | Non-automotive, lower-density PCB layouts where heatsink mounting is preferred over SMT | Select when cost sensitivity outweighs automotive qualification and board space constraints |
| IPD60R950P7 | 600 V, 950 mΩ, 5.2 A, TO-252; CoolMOS™ P7, 12 nC Qg, no 100% avalanche test | Consumer PSU and lighting where partial avalanche margin suffices | Choose when prioritizing lowest gate charge over guaranteed avalanche ruggedness |
Compared with STP7NM60 and IPD60R950P7, STD7ANM60N uniquely combines AEC-Q101 compliance, 100% avalanche screening, and MDmesh II's optimized RDS(on)×Qg trade-off-making it the only option qualified for automotive-grade 600 V switching where both reliability and efficiency are non-negotiable.
Availability
STD7ANM60N is available at Aetrix Electronics and suitable for automotive on-board chargers, industrial motor drives, and telecom rectifier modules requiring stable component supply across extended product lifecycles.
Supply support for STD7ANM60N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for automotive, industrial, and consumer markets.
STD7ANM60N belongs to ST's MDmesh™ II high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-reliability switching in automotive and industrial power conversion systems up to 600 V.
FAQ
What is the maximum continuous drain current at 100 °C case temperature?
The STD7ANM60N supports 3 A continuous drain current at TC = 100 °C, as specified in Table 1 of DS9116 Rev 4. This derating reflects thermal limitations of the DPAK package; operation above this current requires active cooling or pulsed duty cycles limited by safe operating area curves.
Does the body diode support synchronous rectification?
No-the integrated body diode has 213 ns reverse recovery time and 1.5 µC Qrr at 25 °C, making it unsuitable for synchronous rectification. It is designed for freewheeling and clamping functions only; external Schottky or GaN FETs are required for synchronous operation.
Is the DPAK package lead-free and RoHS compliant?
Yes-STD7ANM60N uses ST's ECOPACK®-compliant DPAK (TO-252) package, meeting RoHS Directive 2011/65/EU and JEDEC J-STD-020 moisture sensitivity level 1 (MSL1) for unlimited floor life at ≤30 °C/60% RH.
Can this MOSFET replace STD7NM60N in existing designs?
Yes-STD7ANM60N is a direct drop-in replacement for STD7NM60N with identical pinout, package, and voltage rating, but offers improved RDS(on) (900 mΩ vs. 1.2 Ω), lower Qg (14 nC vs. 22 nC), and AEC-Q101 qualification-enabling performance and reliability upgrades without layout changes.
STD7ANM60N Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- MDmesh™ II
- Package/Case:
- TO-252-3, DPAK (2 Leads + Tab), SC-63
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 600 V
- Current - Continuous Drain (Id) @ 25°C:
- 5A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 900mOhm @ 2.5A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 14 nC @ 10 V
- Vgs (Max):
- ±25V
- Input Capacitance (Ciss) (Max) @ Vds:
- 363 pF @ 50 V
- FET Feature:
- -
- Power Dissipation (Max):
- 45W (Tc)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DPAK
STD7ANM60N FAQ
1.How can I place an order for STD7ANM60N through Aetrix?
Please submit a Request for Quotation (RFQ) for STD7ANM60N on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STD7ANM60N reliable?
The price and inventory of STD7ANM60N are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STD7ANM60N is usually 5 days.
3.What payment methods are accepted for STD7ANM60N?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STD7ANM60N transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STD7ANM60N?
STD7ANM60N orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STD7ANM60N order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STD7ANM60N?
For technical support, including STD7ANM60N datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STD7ANM60N requirements.
6.How does Aetrix verify that STD7ANM60N is sourced from the original manufacturer or authorized distributors?
All STD7ANM60N products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STD7ANM60N meets industry standards.
7.What is the process for return or replacement of STD7ANM60N?
All STD7ANM60N units undergo pre-shipment inspection (PSI). If there is an issue with STD7ANM60N, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STD7ANM60N part is unused and in its original packaging.
Return procedure for STD7ANM60N:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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