STMicroelectronics STD9N60M2

Overview

STD9N60M2 from STMicroelectronics is an N-channel 600 V, 0.78 Ω max, 5.5 A Power MOSFET in DPAK (TO-252) package, built on MDmesh™ M2 strip layout technology. It delivers low gate charge (10 nC), optimized COSS profile (88 pF equivalent), and 100% avalanche-tested ruggedness for high-efficiency flyback and PFC stages in industrial SMPS.

For engineers reviewing the STD9N60M2 datasheet, STD9N60M2 pinout, STD9N60M2 application, or STD9N60M2 equivalent, key selection criteria include RDS(on) stability over temperature, diode recovery performance (trr = 265 ns at 150 °C), dv/dt ruggedness (50 V/ns), and thermal resistance junction-to-case (2.08 °C/W).

Technical Context

This device uses ST's MDmesh™ M2 vertical superjunction architecture with optimized charge balance and reduced cell pitch to achieve 600 V breakdown while minimizing conduction and switching losses. Its Zener-protected gate ensures ±25 V ESD tolerance and robust drive interface compatibility.

The integrated source-drain diode features soft recovery (Qrr = 1.65 µC, IRRM = 12.5 A) and low forward voltage (VSD = 1.6 V at 5.5 A), enabling quasi-resonant and hard-switched topologies without external snubbing in many cases.

Key Specifications

Pinout & Package

DPAK (TO-252) package with exposed drain tab (pin 2) for thermal and electrical connection; surface-mount footprint compatible with IPC-7351B standard; recommended copper pad area ≥1 in² (2 Oz FR-4) for optimal thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Compared with STP9N60M2 and STU9N60M2, STD9N60M2 offers the best thermal interface for automated SMT production, balancing low R_thj-pcb (50 °C/W) with high power density (60 W), making it optimal for high-volume, space-constrained industrial power supplies.

Availability

STD9N60M2 is available at Aetrix Electronics and suitable for industrial SMPS, server PSU, motor drive inverter, and EV onboard charger applications requiring stable component supply across multi-year production cycles.

Supply support for STD9N60M2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power, analog, MEMS, and microcontroller technologies for industrial, automotive, and consumer markets.

STD9N60M2 belongs to the MDmesh™ M2 high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-power-density offline converters and resonant topologies demanding low switching loss and rugged avalanche behavior.

FAQ

What is the maximum continuous drain current at 100 °C case temperature?

The maximum continuous drain current (I_D) for STD9N60M2 at T_case = 100 °C is 3.6 A, as specified in Table 1 of DS9553 Rev 3. This rating accounts for thermal derating due to junction-to-case thermal resistance (2.08 °C/W) and safe operating area limits at elevated temperatures.

Does STD9N60M2 include integrated gate protection?

Yes - STD9N60M2 integrates a Zener diode between gate and source, providing ±25 V gate-source voltage clamping. This eliminates the need for external gate protection components in most applications and improves robustness against ESD and transient overvoltage events.

Can STD9N60M2 replace older STD9N60M devices in existing designs?

Yes, STD9N60M2 is a direct upgrade to STD9N60M with improved R_DS(on) (0.72 Ω typ. vs 0.85 Ω), lower Q_g (10 nC vs 14 nC), and enhanced avalanche ruggedness (E_AS = 105 mJ vs 75 mJ). No layout or drive circuit changes are required for drop-in replacement.

What is the recommended PCB layout for thermal performance?

For optimal thermal performance, ST recommends a minimum 1 in² (25.4 mm × 25.4 mm) copper pour on the component side, connected directly to the exposed drain tab via ≥4 thermal vias (0.3 mm diameter, filled or plated). Use 2 Oz copper thickness and avoid solder mask over the thermal pad per Figure 24 in DS9553.