STMicroelectronics STD9N65M2
- Part No.:
- STD9N65M2
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- TO-252-3, DPAK (2 Leads + Tab), SC-63
- Datasheet:
-
STD9N65M2.pdf
- Description:
- MOSFET N-CH 650V 5A DPAK
- Quantity:
- Payment:

- Shipping:

Inventory:675
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STD9N65M2 from STMicroelectronics is an N-channel 650 V, 0.90 Ω (max), 5 A Power MOSFET in DPAK (TO-252) package, utilizing MDmesh M2 strip-layout technology for low gate charge (10.3 nC) and optimized COSS profile (109 pF energy-equivalent). It is designed for high-efficiency AC-DC flyback and PFC stages in industrial power supplies.
For engineers reviewing the STD9N65M2 datasheet, STD9N65M2 pinout, STD9N65M2 application, or STD9N65M2 equivalent, key selection criteria include avalanche ruggedness (105 mJ single-pulse), Zener-protected gate (±25 V rating), 15 V/ns diode recovery dv/dt capability, and thermal resistance of 2.08 °C/W (junction-to-case) in DPAK.
Technical Context
This device implements ST's MDmesh M2 vertical superjunction architecture with a strip-based cell layout, enabling reduced RDS(on) × Qg figure-of-merit. Its 650 V breakdown voltage is guaranteed at ID = 1 mA with 2–4 V gate threshold and exhibits stable V(BR)DSS over temperature (±8% from –75 °C to 125 °C).
The integrated body diode features 276 ns reverse recovery time (TJ = 25 °C) and 1.7 µC Qrr, supported by 100% avalanche testing per unit. Gate drive compatibility is ensured by low intrinsic gate resistance (6.6 Ω) and Zener clamping between gate and source.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 650 V - Sustains full mains-derived DC bus voltages in 400 V nominal PFC and offline SMPS designs. |
| RDS(on) max | 0.90 Ω - Enables <5 W conduction loss at 5 A continuous drain current (TC = 25 °C). |
| Qg | 10.3 nC - Reduces gate drive power and enables efficient operation with standard 10 V logic-level drivers. |
| Coss,eq | 109 pF - Low stored output capacitance energy improves light-load efficiency and reduces switching loss during hard commutation. |
| EAS | 105 mJ - Confirmed single-pulse avalanche energy supports unclamped inductive switching in flyback snubberless topologies. |
| Rthj-case | 2.08 °C/W - Allows direct mounting on PCB copper pour for thermal management without external heatsink in ≤15 W applications. |
| ID (TC = 100 °C) | 3.2 A - Specifies usable current derating for sustained operation in enclosed industrial enclosures. |
Pinout & Package
DPAK (TO-252) package: surface-mount, 3-terminal, exposed drain pad for thermal and electrical connection. Dimensions conform to JEDEC TO-252AA (Type A/C); recommended footprint per Figure 25 (DS10197 Rev 3, p.14).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Control terminal; accepts 0–10 V logic-level drive; Zener-protected to ±25 V. |
| 2 (D) | Drain | Main high-side switching node; electrically and thermally connected to exposed copper pad. |
| 3 (S) | Source | Power return reference; ties to driver ground and provides Kelvin sense path for accurate gate control. |
Key Features
| Feature | Design Value |
|---|---|
| Extremely low gate charge | 10.3 nC total gate charge enables fast turn-on/turn-off with minimal driver loss in high-frequency PFC. |
| Optimized COSS profile | 109 pF energy-equivalent Coss reduces capacitive switching loss and improves zero-voltage switching margin. |
| 100% avalanche tested | Each unit validated for 105 mJ single-pulse avalanche energy-critical for reliability in flyback transformer reset. |
| Zener-protected gate | Integrated gate-source Zener clamp ensures robustness against ESD and gate overvoltage during board handling or layout transients. |
| MDmesh M2 technology | Strip layout and enhanced vertical structure deliver 0.90 Ω RDS(on) at 650 V-22% lower than predecessor M1 generation. |
Applications
| Industrial AC-DC Adapters | Server PSU PFC Stages |
|---|---|
|
Use Scenario: 30–65 W universal-input offline adapters for PLC I/O modules and HMI panels. IC Role / Device Role / Timing Role: Primary-side switch in quasi-resonant flyback topology operating at 65–130 kHz. Use Value: Low Qg and COSS enable >90% efficiency at 230 VAC full load while maintaining <50 mW no-load consumption. |
Use Scenario: Boost-type active PFC front-end in 500–1000 W server power supplies. IC Role / Device Role / Timing Role: High-voltage switch in continuous conduction mode (CCM) PFC controller interface. Use Value: 650 V rating and 3.2 A derated current support 400 V DC bus hold-up under brownout, with 15 V/ns dv/dt immunity preventing false turn-on. |
| Solar Microinverter DC-DC Stage | EV Onboard Charger Auxiliary Supply |
|
Use Scenario: Isolated auxiliary supply (12 V/2 A) powered from PV string voltage (up to 600 V). IC Role / Device Role / Timing Role: Primary switch in forward converter driving synchronous rectification. Use Value: Avalanche ruggedness eliminates need for external snubbers, reducing BOM count and improving MTBF in field-deployed units. |
Use Scenario: 15 V/1 A isolated bias supply for gate drivers and MCU in 6.6 kW OBC systems. IC Role / Device Role / Timing Role: High-side switch in self-oscillating flyback with primary-side regulation. Use Value: DPAK thermal resistance (2.08 °C/W) allows conduction cooling on 1-inch² 2 oz copper, eliminating discrete heatsink in space-constrained OBC modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 650 V Power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STP9N65M2 | Same die, TO-220 package; Rthj-case = 2.08 °C/W but higher mounting height and through-hole assembly. | Preferred where mechanical robustness and manual reworkability outweigh PCB area constraints. | Select when board-level vibration resistance or legacy through-hole production lines are required. |
| IPB9N65M2 | Same MDmesh M2 process, but IPAK (TO-251) package; identical RDS(on) and Qg, but Rthj-case = 2.08 °C/W and larger creepage distance. | Better suited for reinforced insulation requirements in medical or EV auxiliary supplies. | Choose when ≥8 mm creepage/clearance is mandated and surface-mount assembly is acceptable. |
Compared with STP9N65M2 and IPB9N65M2, STD9N65M2 offers optimal PCB area efficiency and thermal performance for automated SMT lines, while maintaining identical electrical specs-making it the preferred choice for high-volume, space-constrained industrial power modules.
Availability
STD9N65M2 is available at Aetrix Electronics and suitable for industrial AC-DC adapters, server PSU PFC stages, and solar microinverter auxiliary supplies requiring stable component supply and long-term manufacturability.
Supply support for STD9N65M2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.
STD9N65M2 belongs to the MDmesh M2 Power MOSFET product line, engineered specifically for high-efficiency, high-voltage switching in 65–300 kHz industrial power conversion systems where low RDS(on) × Qg trade-offs are critical.
FAQ
What is the maximum continuous drain current for STD9N65M2 at 100 °C case temperature?
The maximum continuous drain current is 3.2 A at TC = 100 °C, as specified in Table 1 (DS10197 Rev 3, p.2). This value is limited by package thermal constraints-not silicon capability-and assumes adequate PCB copper area for heat dissipation.
Does STD9N65M2 include integrated gate protection?
Yes-STD9N65M2 integrates a Zener diode between gate and source, rated for ±25 V, providing inherent protection against electrostatic discharge and gate overvoltage transients during PCB handling or system-level ESD events.
Can STD9N65M2 replace older MDmesh M1 devices like STD9N65M1 in existing designs?
Yes-STD9N65M2 is a direct drop-in replacement for STD9N65M1 with identical pinout, package, and voltage rating, but delivers 22% lower RDS(on) (0.90 Ω vs. 1.15 Ω max) and 15% lower Qg (10.3 nC vs. 12.1 nC), enabling measurable efficiency gains without layout changes.
What is the safe operating area (SOA) limitation at 100 µs pulse width and 150 °C junction temperature?
At 100 µs pulse width and TJ = 150 °C, the SOA is limited to 1 A at 400 V VDS (Figure 1, DS10197 Rev 3, p.5). This reflects the device's avalanche-rated capability-not linear-mode operation-and applies only to single-pulse, non-repetitive conditions.
STD9N65M2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- MDmesh™
- Package/Case:
- TO-252-3, DPAK (2 Leads + Tab), SC-63
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 650 V
- Current - Continuous Drain (Id) @ 25°C:
- 5A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 900mOhm @ 2.5A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 10 nC @ 10 V
- Vgs (Max):
- ±25V
- Input Capacitance (Ciss) (Max) @ Vds:
- 315 pF @ 100 V
- FET Feature:
- -
- Power Dissipation (Max):
- 60W (Tc)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DPAK
STD9N65M2 FAQ
1.How can I place an order for STD9N65M2 through Aetrix?
Please submit a Request for Quotation (RFQ) for STD9N65M2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STD9N65M2 reliable?
The price and inventory of STD9N65M2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STD9N65M2 is usually 5 days.
3.What payment methods are accepted for STD9N65M2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STD9N65M2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STD9N65M2?
STD9N65M2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STD9N65M2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STD9N65M2?
For technical support, including STD9N65M2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STD9N65M2 requirements.
6.How does Aetrix verify that STD9N65M2 is sourced from the original manufacturer or authorized distributors?
All STD9N65M2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STD9N65M2 meets industry standards.
7.What is the process for return or replacement of STD9N65M2?
All STD9N65M2 units undergo pre-shipment inspection (PSI). If there is an issue with STD9N65M2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STD9N65M2 part is unused and in its original packaging.
Return procedure for STD9N65M2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STD9N65M2 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

;;2.jpg)