STMicroelectronics STH240N10F7-6
- Part No.:
- STH240N10F7-6
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- TO-263-7, D2PAK (6 Leads + Tab)
- Datasheet:
-
STH240N10F7-6.pdf
- Description:
- MOSFET N-CH 100V 180A H2PAK-6
- Quantity:
- Payment:

- Shipping:

Inventory:1,273
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STH240N10F7-6 from STMicroelectronics is an N-channel 100 V, 2 mΩ typ. (2.5 mΩ max), 180 A Power MOSFET in H²PAK-6 package, utilizing STripFET™ F7 trench-gate technology for ultra-low RDS(on) and optimized switching performance. It delivers high avalanche ruggedness (500 mJ EAS), low Crss/Ciss ratio for EMI immunity, and is engineered for high-efficiency DC-DC converters and motor drive half-bridges.
For engineers reviewing the STH240N10F7-6 datasheet, STH240N10F7-6 pinout, STH240N10F7-6 application, or STH240N10F7-6 equivalent, key selection criteria include its 0.5 °C/W Rthj-case, 160 nC total gate charge, 108 ns reverse recovery time, and H²PAK-6 thermal pad layout compatibility with high-current PCB heatsinking.
Technical Context
This MOSFET employs an enhanced trench gate structure that reduces both RDS(on) and gate charge while maintaining robust safe operating area (SOA) up to 100 µs at 100 V/180 A. Its Crss/Ciss ratio of ~1.9% (217 pF / 11550 pF) minimizes Miller-induced switching instability under fast dv/dt conditions.
The device supports high-current pulsed operation (IDM = 720 A) and features a low 1.2 V source-drain forward voltage at 180 A, enabling efficient synchronous rectification. Thermal resistance junction-to-case is fixed at 0.5 °C/W, confirming direct metal tab conduction path design in the H²PAK-6 package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Rated drain-source blocking voltage for 48 V–60 V bus systems with 20% derating margin |
| RDS(on) max | 2.5 mΩ - Enables ≤0.81 W conduction loss at 180 A continuous current (TC = 25 °C) |
| ID cont @ TC=100 °C | 120 A - Real-world continuous current rating under industrial thermal conditions |
| EAS | 500 mJ - Single-pulse avalanche energy tolerance supports unclamped inductive switching in motor drives |
| Qg | 160 nC - Total gate charge determines driver power requirement and switching speed trade-off |
| Rthj-case | 0.5 °C/W - Confirms direct thermal path from die to exposed copper tab for forced-air or heatsink cooling |
| VSD | 1.2 V @ ISD = 180 A - Low body diode forward drop improves efficiency in bidirectional or freewheeling paths |
Pinout & Package
H²PAK-6 package features a single large exposed copper drain tab (D) on the underside, with three source terminals (S) and one gate terminal (G) on the top side. The mechanical outline includes six leads: Tab (D), Pin 1 (G), Pins 2–3–4–5–6–7 (S). Thermal performance relies on soldering the tab directly to a PCB copper pour or heatsink.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Tab (Drain) | Main high-current drain connection | Exposed copper thermal and electrical path; must be soldered to PCB ground plane or heatsink |
| Pin 1 (G) | Gate control input | Low-impedance gate drive node; requires <100 nF local decoupling and controlled slew rate |
| Pins 2, 3, 4, 5, 6, 7 (S) | Source return path | Parallel source terminals reduce bond wire inductance and improve current sharing in high-di/dt applications |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low RDS(on) | 2 mΩ typical enables >98% efficiency in 48 V, 10 kW DC-DC stages at full load |
| Low Crss/Ciss ratio | 1.9% (217/11550 pF) suppresses false turn-on during high dv/dt commutation in bridge legs |
| High avalanche ruggedness | 500 mJ EAS allows reliable operation without external snubbers in inductive load switching |
| Optimized SOA | Supports 180 A @ 100 V for 100 µs pulses - suitable for short-circuit tolerant motor phase legs |
| H²PAK-6 thermal interface | 0.5 °C/W Rthj-case enables 300 W dissipation with ≤150 °C junction rise over 25 °C case |
Applications
| Industrial Motor Drives | Server PSU Primary Switch |
|---|---|
|
Use Scenario: Half-bridge inverter stage for 3-phase BLDC motors in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: High-side and low-side power switch handling 180 A peak phase current with 100 kHz PWM. Use Value: 2.5 mΩ RDS(on) reduces conduction loss by 35% vs. legacy 4 mΩ MOSFETs, lowering heatsink size by 40%. |
Use Scenario: Primary-side switching element in 3.3 kW LLC resonant converter for AI server power supplies. IC Role / Device Role / Timing Role: Fast-switching primary FET synchronized with zero-voltage switching (ZVS) transitions. Use Value: 160 nC Qg and low Coss (2950 pF) enable stable ZVS across 20–100% load range without auxiliary circuits. |
| EV Onboard Charger | Renewable Energy Inverter |
|
Use Scenario: Bidirectional AC/DC conversion stage in 11 kW OBC using dual active bridge topology. IC Role / Device Role / Timing Role: Synchronous rectifier and power switch in high-frequency isolated DC link. Use Value: 1.2 V VSD and 108 ns trr minimize reverse recovery loss and EMI during hard-commutation events. |
Use Scenario: DC-link switching in 15 kW string inverters for commercial solar farms. IC Role / Device Role / Timing Role: High-reliability power switch operating continuously at 85 °C ambient with 175 °C Tj rating. Use Value: -55 to 175 °C Tj range and 500 mJ EAS ensure field reliability under grid fault transients and lightning surges. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 100 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IXFH180N10P | RDS(on) = 3.2 mΩ max; Qg = 195 nC; TO-247-3L package | Higher conduction loss and gate drive demand; larger footprint and higher Rthj-case (0.75 °C/W) | Prefer when legacy TO-247 layout reuse is required and 15% efficiency penalty is acceptable |
| IPB180N10N3 G | RDS(on) = 2.3 mΩ max; Qg = 145 nC; PG-H2PAK-6 package (pin-compatible) | Lower gate charge improves switching efficiency but reduced EAS (350 mJ) limits fault tolerance | Choose when optimizing for light-load efficiency in SMPS, not avalanche-prone motor drives |
Compared with IXFH180N10P and IPB180N10N3G, STH240N10F7-6 uniquely balances lowest RDS(on), highest EAS, and industry-leading Crss/Ciss ratio-making it optimal for high-reliability, high-power-density applications where both conduction and switching losses must be minimized under transient stress.
Availability
STH240N10F7-6 is available at Aetrix Electronics and suitable for industrial motor drives, server power supplies, EV onboard chargers, and renewable energy inverters requiring stable component supply and long-term production continuity.
Supply support for STH240N10F7-6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.
This device belongs to ST's STripFET™ F7 high-voltage power MOSFET product line, developed specifically for high-efficiency, high-current switching in next-generation power conversion systems demanding ultra-low RDS(on) and robust avalanche capability.
FAQ
What is the maximum continuous drain current at 100 °C case temperature?
The STH240N10F7-6 supports 120 A continuous drain current when the case temperature is maintained at 100 °C, as specified in Table 1 of DS10259 Rev 3. This rating accounts for thermal derating and package current-handling limits-not just silicon capability-and assumes proper PCB copper area and airflow per the H²PAK-6 footprint guidelines.
Does this MOSFET have a built-in body diode, and what are its key parameters?
Yes, it integrates a fast, low-VSD body diode rated for 180 A continuous and 720 A pulsed source-drain current. Key specs include 1.2 V forward voltage at 180 A, 108 ns reverse recovery time (trr), 315 nC reverse recovery charge (Qrr), and 5.8 A peak reverse recovery current (IRRM)-all measured at Tj = 150 °C and di/dt = 100 A/µs.
Can STH240N10F7-6 be used in parallel configurations?
Yes-its positive temperature coefficient of RDS(on) (confirmed in Figure 12) ensures inherent current sharing stability. Parallel operation requires matched gate drive impedance, symmetrical PCB layout, and shared thermal mass. ST recommends limiting parallel count to ≤4 devices with individual 10 Ω gate resistors and Kelvin source routing to avoid oscillation.
What is the recommended gate drive voltage range and why?
The absolute maximum VGS is ±20 V, but ST specifies 10 V as the standard gate drive for full RDS(on) enhancement. Driving at 12–15 V yields marginal RDS(on) improvement (<3%) while increasing gate oxide stress and ESD risk. Below 4.5 V, the device operates in linear mode with excessive conduction loss-so 10 V ±0.5 V is the optimal balance of performance, reliability, and drive simplicity.
STH240N10F7-6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STripFET™ F7
- Package/Case:
- TO-263-7, D2PAK (6 Leads + Tab)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 180A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 2.5mOhm @ 60A, 10V
- Vgs(th) (Max) @ Id:
- 4.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 160 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 11550 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 300W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- H2PAK-6
STH240N10F7-6 FAQ
1.How can I place an order for STH240N10F7-6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STH240N10F7-6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STH240N10F7-6 reliable?
The price and inventory of STH240N10F7-6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STH240N10F7-6 is usually 5 days.
3.What payment methods are accepted for STH240N10F7-6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STH240N10F7-6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STH240N10F7-6?
STH240N10F7-6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STH240N10F7-6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STH240N10F7-6?
For technical support, including STH240N10F7-6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STH240N10F7-6 requirements.
6.How does Aetrix verify that STH240N10F7-6 is sourced from the original manufacturer or authorized distributors?
All STH240N10F7-6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STH240N10F7-6 meets industry standards.
7.What is the process for return or replacement of STH240N10F7-6?
All STH240N10F7-6 units undergo pre-shipment inspection (PSI). If there is an issue with STH240N10F7-6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STH240N10F7-6 part is unused and in its original packaging.
Return procedure for STH240N10F7-6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STH240N10F7-6 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

