STMicroelectronics STI4N62K3
- Part No.:
- STI4N62K3
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- TO-262-3 Long Leads, I2PAK, TO-262AA
- Datasheet:
-
STI4N62K3.pdf
- Description:
- MOSFET N-CH 620V 3.8A I2PAK
- Quantity:
- Payment:

- Shipping:

Inventory:4,262
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Product details
Overview
STI4N62K3 from STMicroelectronics is an N-channel 620 V, 1.7 Ω typ. (2 Ω max.), 3.8 A MDmesh K3 Power MOSFET in I²PAK package, designed for high-voltage switching in offline SMPS, PFC stages, and industrial motor drives where avalanche ruggedness and low dynamic losses are critical.
For engineers reviewing the STI4N62K3 datasheet, STI4N62K3 pinout, STI4N62K3 application, or STI4N62K3 equivalent, this device delivers verified 12 V/ns dv/dt capability, 115 mJ single-pulse avalanche energy, 22 nC total gate charge, and Zener-protected gate-key parameters for reliable hard-switching and unclamped inductive load operation.
Technical Context
This MOSFET employs ST's optimized MDmesh K3 vertical structure to achieve ultra-low RDS(on) × Qg figure-of-merit (≈37.4 Ω·nC), enabling high-efficiency operation at 620 V blocking voltage while maintaining robust 150 °C junction temperature rating and 100% avalanche-tested reliability.
Its intrinsic gate resistance (2–10 Ω), low Ciss/Coss ratio (550 pF / 42 pF), and fast reverse recovery diode (trr = 220 ns @ 25 °C) support stable high-frequency switching up to 100 kHz in continuous conduction mode (CCM) PFC and resonant LLC topologies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 620 V - Enables direct connection to 400 V DC bus with 55 % safety margin for 230 V AC mains input. |
| RDS(on) max | 2 Ω @ VGS = 10 V, ID = 1.9 A - Limits conduction loss to ≤7.2 W at 3.8 A, supporting TO-220FP thermal envelope. |
| Qg | 22 nC - Determines gate drive power requirement (~220 µW per 100 kHz switch cycle at 10 V swing). |
| EAS | 115 mJ - Sustains single unclamped inductive switching events without failure under 50 V VDD. |
| tr/tf | 9 ns / 19 ns - Enables <100 ns total switching transition time, reducing overlap loss in hard-switched converters. |
| Coss | 42 pF - Minimizes capacitive turn-off loss and improves zero-voltage switching (ZVS) initiation in resonant designs. |
| VSD | 1.6 V @ ISD = 3.8 A - Low forward drop reduces body-diode conduction loss during dead-time in half-bridge configurations. |
Pinout & Package
I²PAK (TO-263) package: insulated plastic case with integral heatsink tab; footprint compatible with surface-mount reflow assembly and through-hole heatsinking via tab screw.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D (Tab) | Drain | Electrically connected to exposed metal tab; must be isolated from heatsink unless referenced to system ground. |
| G (Pin 1) | Gate | High-impedance control terminal; requires Zener protection (integrated) against ±30 V transients. |
| S (Pin 3) | Source | Return path for drain current; defines local ground reference for gate drive circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| 100% avalanche tested | Guarantees minimum 115 mJ EAS per unit-no screening failures in production, eliminating field stress derating. |
| Extremely high dv/dt capability | 12 V/ns rated slope ensures immunity to parasitic turn-on during fast voltage transients in bridge-leg configurations. |
| Very low intrinsic capacitance | Ciss/Coss = 550/42 pF enables >90 % efficiency in 65–100 kHz PFC stages with minimal capacitive loss. |
| Zener-protected gate | Integrated 2.5 kV HBM ESD protection eliminates need for external gate clamping in PCB layout. |
| Improved diode reverse recovery | trr = 220 ns and Qrr = 1.4 µC reduce switching noise and EMI in hard-commutated half-bridges. |
Applications
| Industrial Switch-Mode Power Supply | Active PFC Front-End |
|---|---|
|
Use Scenario: 500 W offline flyback converter operating at 65 kHz with universal AC input (85–265 V AC). IC Role / Device Role / Timing Role: Primary-side high-voltage switch handling full DC bus voltage and peak currents up to 3.8 A. Use Value: 620 V VDS rating and 2 Ω RDS(on) enable >89 % efficiency at full load without forced air cooling. |
Use Scenario: Boost-type active PFC stage in 1 kW server PSU with 400 V DC output. IC Role / Device Role / Timing Role: Fast-switching boost switch managing 10 A peak inductor current at 100 kHz. Use Value: Low Qg (22 nC) and Coss (42 pF) minimize switching loss, enabling >96 % PFC efficiency. |
| Motor Drive Inverter Stage | LED Driver for High-Bay Lighting |
|
Use Scenario: 3-phase inverter driving 750 W BLDC motor in HVAC fan controller. IC Role / Device Role / Timing Role: Upper-leg IGBT replacement in 20 kHz PWM inverter leg with shoot-through protection. Use Value: 12 V/ns dv/dt immunity prevents false triggering during high dV/dt commutation of lower-leg devices. |
Use Scenario: Buck-boost LED driver powering 120 W high-intensity discharge (HID)-replacement lamp. IC Role / Device Role / Timing Role: Main switching element regulating constant current into 48 V LED string from 300 V DC bus. Use Value: Avalanche ruggedness (115 mJ) absorbs inductive kickback from long LED cable runs without snubber circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage power switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STF4N62K3 | Same die, TO-220FP package; RthJC = 5 °C/W vs. 1.79 °C/W for I²PAK; lower power dissipation limit (25 W vs. 70 W). | Preferred for prototyping or low-volume through-hole assemblies where heatsink mounting is simpler. | Select when mechanical compatibility with legacy TO-220 footprints is required and thermal budget allows ≤25 W. |
| STU4N62K3 | Same die, IPAK (TO-251) package; smaller footprint, no isolation tab; RthJC = 1.79 °C/W but limited heatsink interface area. | Better suited for space-constrained consumer electronics where board-level thermal management dominates. | Choose for compact SMT designs needing 620 V rating but lacking dedicated heatsink mounting provisions. |
Compared with STF4N62K3 and STU4N62K3, STI4N62K3 offers optimal balance of thermal performance (70 W rating), surface-mount manufacturability, and electrical isolation-making it the preferred choice for volume production of industrial power supplies requiring >50 W continuous output.
Availability
STI4N62K3 is available at Aetrix Electronics and suitable for industrial motor drives, active PFC front-ends, and high-bay LED lighting systems requiring stable component supply across multi-year production cycles.
Supply support for STI4N62K3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, microcontrollers, and analog/mixed-signal ICs for industrial, automotive, and consumer markets.
The MDmesh K3 series targets high-efficiency, high-reliability power conversion-specifically engineered for 600–650 V applications demanding low RDS(on), fast switching, and guaranteed avalanche robustness.
FAQ
What is the maximum continuous drain current for STI4N62K3 at 100 °C case temperature?
The maximum continuous drain current is 2 A at TC = 100 °C, as specified in Table 1 of DS6843 Rev 5. This derating from 3.8 A (at 25 °C) reflects thermal limits imposed by the I²PAK package's 1.79 °C/W junction-to-case resistance and safe operating area constraints.
Does STI4N62K3 include integrated gate protection?
Yes-STI4N62K3 integrates a Zener diode between gate and source, providing ±30 V absolute maximum gate-source voltage rating and 2.5 kV human-body-model ESD protection, eliminating the need for external gate clamp components in most designs.
Can STI4N62K3 replace STF4N62K3 in an existing TO-220FP design?
No direct drop-in replacement: STI4N62K3 uses I²PAK (TO-263) packaging with different pinout (G-D-S vs. G-S-D), tab polarity, and thermal interface requirements. PCB redesign and gate drive layout revision are mandatory due to altered creepage/clearance and heatsink mounting geometry.
What is the typical reverse recovery charge (Qrr) of the body diode at 150 °C junction temperature?
At TJ = 150 °C, Qrr is 1.9 µC (Table 7), measured under ISD = 3.8 A, di/dt = 100 A/µs, and VDD = 60 V. This increase from 1.4 µC at 25 °C reflects higher minority-carrier lifetime and must be accounted for in dead-time optimization.
STI4N62K3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- SuperMESH3™
- Package/Case:
- TO-262-3 Long Leads, I2PAK, TO-262AA
- Packaging:
- Tube
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 620 V
- Current - Continuous Drain (Id) @ 25°C:
- 3.8A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 2Ohm @ 1.9A, 10V
- Vgs(th) (Max) @ Id:
- 4.5V @ 50µA
- Gate Charge (Qg) (Max) @ Vgs:
- 22 nC @ 10 V
- Vgs (Max):
- ±30V
- Input Capacitance (Ciss) (Max) @ Vds:
- 550 pF @ 50 V
- FET Feature:
- -
- Power Dissipation (Max):
- 70W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- I2PAK
STI4N62K3 FAQ
1.How can I place an order for STI4N62K3 through Aetrix?
Please submit a Request for Quotation (RFQ) for STI4N62K3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STI4N62K3 reliable?
The price and inventory of STI4N62K3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STI4N62K3 is usually 5 days.
3.What payment methods are accepted for STI4N62K3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STI4N62K3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STI4N62K3?
STI4N62K3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STI4N62K3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STI4N62K3?
For technical support, including STI4N62K3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STI4N62K3 requirements.
6.How does Aetrix verify that STI4N62K3 is sourced from the original manufacturer or authorized distributors?
All STI4N62K3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STI4N62K3 meets industry standards.
7.What is the process for return or replacement of STI4N62K3?
All STI4N62K3 units undergo pre-shipment inspection (PSI). If there is an issue with STI4N62K3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STI4N62K3 part is unused and in its original packaging.
Return procedure for STI4N62K3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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