STMicroelectronics STL12N60M2
- Part No.:
- STL12N60M2
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- 8-PowerVDFN
- Datasheet:
-
STL12N60M2.pdf
- Description:
- MOSFET N-CH 600V 6.5A POWERFLAT
- Quantity:
- Payment:

- Shipping:

Inventory:7,521
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STL12N60M2 from STMicroelectronics is an N-channel 600 V, 0.400 Ω typ. RDS(on), 6.5 A Power MOSFET in PowerFLAT 5x6 HV package, featuring MDmesh™ M2 technology, 16 nC total gate charge, and 100% avalanche tested for robustness in high-efficiency SMPS and PFC stages.
For engineers reviewing the STL12N60M2 datasheet, STL12N60M2 pinout, STL12N60M2 application, or STL12N60M2 equivalent, key selection criteria include its 2.4 °C/W junction-to-case thermal resistance, 50 V/ns MOSFET dv/dt ruggedness, 284 ns diode reverse recovery time at 150 °C, and Zener-protected gate for ESD resilience in industrial power converters.
Technical Context
This device employs ST's MDmesh™ M2 vertical superjunction architecture with strip layout to achieve low RDS(on) × Qg figure-of-merit (0.400 Ω × 16 nC = 6.4 Ω·nC), optimized for hard-switched and resonant topologies operating up to 100 kHz. Its Coss eq. of 106 pF enables predictable turn-off energy and reduced voltage overshoot during inductive switching.
The integrated source-drain diode delivers 9 A continuous forward current with 1.6 V VSD at 9 A and controlled reverse recovery (Qrr = 2.4 µC at Tj = 25 °C), supporting synchronous rectification and flyback snubberless designs without external diode supplementation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 600 V - supports 400 V AC input PFC and 380 V DC bus applications with 20% margin |
| RDS(on) max | 0.495 Ω - limits conduction loss to ≤20 W at 6.5 A continuous drain current |
| Qg | 16 nC - enables fast switching with low gate drive power in 50–100 kHz converters |
| Coss eq. | 106 pF - reduces turn-off switching loss and improves EMI behavior vs. legacy superjunction MOSFETs |
| Rthj-case | 2.4 °C/W - allows 52 W dissipation with ≤120 °C case temperature rise above ambient |
| dv/dt ruggedness | 50 V/ns - ensures reliable operation under fast transient voltage stress in motor drives and inverters |
| IAR | 1.6 A - supports repetitive unclamped inductive switching events without failure |
Pinout & Package
STL12N60M2 uses the PowerFLAT 5x6 HV package - a surface-mount, thermally enhanced, leadless package with exposed drain pad on bottom side for direct PCB thermal coupling. The package features 5 mm × 6 mm footprint, 1.0 mm nominal height, and 8-pin configuration (3 drain pins, 1 source pin, 1 gate pin, 3 thermal pads tied to drain).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Drain (D1–D3) | Main current path collector | Three parallel drain terminals reduce current density and improve thermal spreading into PCB copper |
| Source (S) | Reference node for gate control and load return | Single-source terminal simplifies gate loop layout and minimizes common-source inductance |
| Gate (G) | Control electrode for channel modulation | Low 7 Ω intrinsic gate resistance enables stable, low-overshoot gate drive with standard 10 V logic-level drivers |
| Thermal Pad (TP1–TP3) | Drain-connected thermal interface | Exposed copper area beneath package directly soldered to PCB ground plane for <2.4 °C/W thermal path |
Key Features
| Feature | Design Value |
|---|---|
| MDmesh™ M2 superjunction structure | Delivers 0.400 Ω RDS(on) at 600 V while maintaining low Coss and high dv/dt immunity |
| Zener-protected gate | ±25 V gate-source rating with integrated clamp prevents ESD-induced gate oxide rupture |
| 100% avalanche tested | Each unit validated for single-pulse avalanche energy of 120 mJ at 50 V, ensuring field reliability |
| Optimized COSS profile | Coss eq. = 106 pF over 0–480 V range enables soft turn-off and reduced voltage ringing |
| Low Qgd/Qg ratio | 8.5 nC/16 nC = 0.53 - improves Miller immunity and reduces risk of spurious turn-on in high-dV/dt environments |
Applications
| Server PSU Primary Switch | Industrial PFC Boost Stage |
|---|---|
Use Scenario: High-density 1U server power supply operating at 65–100 kHz with universal AC input (90–264 VAC). IC Role / Device Role / Timing Role: Main switch in continuous conduction mode (CCM) boost PFC stage, handling 6.5 A RMS input current. Use Value: 0.400 Ω RDS(on) and 16 nC Qg enable >96% efficiency at full load while maintaining thermal margin on 2 oz copper PCB. | Use Scenario: 3 kW industrial motor drive front-end with active PFC and 400 V DC link. IC Role / Device Role / Timing Role: Fast-switching boost switch in interleaved dual-phase PFC, rated for 100 kHz operation. Use Value: 50 V/ns dv/dt ruggedness and 284 ns trr ensure stable operation under high di/dt transients and minimize snubber losses. |
| LED Driver Flyback Primary | Solar Microinverter DC-DC Stage |
Use Scenario: 150 W outdoor LED streetlight driver with 305 VAC surge immunity and -40°C to +85°C ambient. IC Role / Device Role / Timing Role: Primary-side switch in quasi-resonant flyback topology, operating up to 130 kHz peak frequency. Use Value: 120 mJ single-pulse avalanche energy rating protects against lightning-induced line surges without external clamping. | Use Scenario: 300 W photovoltaic microinverter DC-DC converter interfacing 30–60 V PV string to 400 V DC link. IC Role / Device Role / Timing Role: High-side switch in two-switch forward or active-clamp forward topology. Use Value: 2.4 °C/W Rthj-case and 52 W PTOT allow full-power operation with passive heatsinking in sealed enclosure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage power switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IPP60R190C6 | 650 V, 0.190 Ω RDS(on), 19.5 nC Qg, TO-220FP package | Higher conduction efficiency but larger footprint and higher switching loss due to 2× Qg | Select when lower RDS(on) outweighs board space and thermal constraints |
| STP12N60M2 | Same die, TO-220 package, identical electrical specs, 62 °C/W Rthj-case | Requires heatsink; unsuitable for ultra-thin or high-density layouts | Select when through-hole assembly or legacy footprint compatibility is required |
Compared with IPP60R190C6, STL12N60M2 trades 0.29 Ω higher RDS(on) for 33% lower Qg and 25× better thermal resistance, making it preferable in compact, air-cooled SMPS. Versus STP12N60M2, it delivers identical performance in half the footprint with direct PCB thermal coupling.
Availability
STL12N60M2 is available at Aetrix Electronics and suitable for server PSUs, industrial PFC modules, LED driver flybacks, and solar microinverter DC-DC stages requiring stable component supply and long-term production continuity.
Supply support for STL12N60M2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and power applications.
The MDmesh™ M2 product line targets high-efficiency, high-reliability power conversion systems where low RDS(on), fast switching, and ruggedness are critical - especially in space-constrained, thermally demanding environments.
FAQ
What is the maximum continuous drain current at 100 °C case temperature?
The STL12N60M2 supports 4.1 A continuous drain current at Tcase = 100 °C, as specified in Table 2 of the datasheet. This derating reflects thermal limits imposed by the 2.4 °C/W junction-to-case resistance and 150 °C maximum junction temperature, ensuring safe operation without forced cooling in enclosed enclosures.
Does this MOSFET include an integrated body diode, and what are its recovery characteristics?
Yes, STL12N60M2 integrates a source-drain diode rated for 9 A continuous and 36 A pulsed current. At 25 °C, its reverse recovery time is 284 ns with 2.4 µC Qrr; at 150 °C, trr increases to 404 ns and Qrr to 3.5 µC. These values are measured under standardized conditions (ISD = 9 A, di/dt = 100 A/µs, VDD = 60 V) and support snubberless flyback and LLC designs.
Can STL12N60M2 be driven directly by a 3.3 V microcontroller GPIO?
No - the gate threshold voltage (VGS(th)) ranges from 2 V to 4 V, but full enhancement requires VGS ≥ 10 V to achieve the specified 0.400 Ω RDS(on). A 3.3 V signal yields high on-resistance and excessive conduction loss. A dedicated gate driver (e.g., STGAP2SICSN) or level-shifting circuit is required for reliable switching.
Is the PowerFLAT 5x6 HV package RoHS-compliant and halogen-free?
Yes - STL12N60M2 is offered in ECOPACK®2-compliant PowerFLAT 5x6 HV packaging, meeting RoHS Directive 2011/65/EU and IEC 61249-2-21:2011 for halogen-free materials. The device carries the "E2" ECOPACK® grade marking, indicating full compliance with ST's environmental standards and suitability for green manufacturing processes.
STL12N60M2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- MDmesh™ M2
- Package/Case:
- 8-PowerVDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 600 V
- Current - Continuous Drain (Id) @ 25°C:
- 6.5A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 495mOhm @ 4.5A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 16 nC @ 10 V
- Vgs (Max):
- ±25V
- Input Capacitance (Ciss) (Max) @ Vds:
- 538 pF @ 100 V
- FET Feature:
- -
- Power Dissipation (Max):
- 52W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerFlat™ (5x6) HV
STL12N60M2 FAQ
1.How can I place an order for STL12N60M2 through Aetrix?
Please submit a Request for Quotation (RFQ) for STL12N60M2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STL12N60M2 reliable?
The price and inventory of STL12N60M2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STL12N60M2 is usually 5 days.
3.What payment methods are accepted for STL12N60M2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STL12N60M2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STL12N60M2?
STL12N60M2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STL12N60M2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STL12N60M2?
For technical support, including STL12N60M2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STL12N60M2 requirements.
6.How does Aetrix verify that STL12N60M2 is sourced from the original manufacturer or authorized distributors?
All STL12N60M2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STL12N60M2 meets industry standards.
7.What is the process for return or replacement of STL12N60M2?
All STL12N60M2 units undergo pre-shipment inspection (PSI). If there is an issue with STL12N60M2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STL12N60M2 part is unused and in its original packaging.
Return procedure for STL12N60M2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STL12N60M2 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

