STMicroelectronics STL13N65M2

Overview

STL13N65M2 from STMicroelectronics is an N-channel 650 V, 0.365 Ω typ. R_DS(on), 6.5 A Power MOSFET using MDmesh™ M2 technology in a PowerFLAT™ 5x6 HV package. It delivers low gate charge (17 nC), optimized COSS profile (27.5 pF typ.), and 100% avalanche tested ruggedness for high-efficiency AC-DC and DC-DC converters operating up to 150 °C junction temperature.

For engineers reviewing the STL13N65M2 datasheet, STL13N65M2 pinout, STL13N65M2 application, or STL13N65M2 equivalent, key selection criteria include its 50 V/ns MOSFET dv/dt ruggedness, 110 mJ single-pulse avalanche energy, Zener-protected gate, and thermal resistance of 2.4 °C/W (junction-to-case), critical for compact high-power SMPS designs.

Technical Context

This device employs ST's MDmesh™ M2 strip layout and enhanced vertical structure to simultaneously reduce conduction loss and switching loss. Its low C_oss (27.5 pF) and C_rss (1.1 pF), combined with 17 nC total gate charge, enable fast, low-loss hard-switching in PFC and LLC resonant topologies.

The integrated Zener-protected gate withstands ±25 V transient stress, while the 150 °C max junction temperature and 2.4 °C/W R_thj-case support high-power density operation on thermally constrained PCBs. Its 312 ns reverse recovery time (T_j = 25 °C) and 2.7 µC Q_rr ensure robust body diode performance in synchronous rectification and freewheeling roles.

Key Specifications

Pinout & Package

STL13N65M2 is housed in a surface-mount PowerFLAT™ 5x6 HV package with an exposed drain pad for thermal and electrical connection. The package features four parallel drain terminals, one gate terminal, and three source terminals - optimized for low-inductance, high-current PCB routing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Compared with IPW65R041CFD7 and STP13N65M2, STL13N65M2 uniquely balances ultra-low R_DS(on), minimal gate charge, and surface-mount thermal performance - making it optimal for high-density, air-cooled 1–3 kW power supplies where footprint and thermal resistance are critical constraints.

Availability

STL13N65M2 is available at Aetrix Electronics and suitable for server PSUs, industrial motor drives, telecom rectifiers, and EV onboard chargers requiring stable component supply and long-term production continuity.

Supply support for STL13N65M2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.

This device belongs to ST's MDmesh™ M2 high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-frequency switched-mode power supplies where low R_DS(on), low Q_g, and avalanche ruggedness are essential.

FAQ

What is the maximum continuous drain current at 100 °C case temperature?

The STL13N65M2 supports 4.1 A continuous drain current at T_C = 100 °C, as specified in Table 2 of the datasheet. This derating reflects thermal limits of the PowerFLAT™ 5x6 HV package and must be applied when ambient or heatsink conditions prevent maintaining T_C ≤ 25 °C.

Does this MOSFET require external gate protection?

No - the STL13N65M2 integrates a Zener diode between gate and source, rated for ±25 V transient clamping. External gate resistors and TVS diodes are not required unless system-level ESD or lightning surge immunity exceeds IEC 61000-4-2 Level 4 or IEC 61000-4-5.

Can STL13N65M2 replace STP13N65M2 in existing designs?

Yes, with PCB layout changes: both share identical electrical specs, but STL13N65M2 uses PowerFLAT™ 5x6 HV (surface-mount), whereas STP13N65M2 uses TO-220FP (through-hole). Thermal design must be revalidated due to lower R_thj-case (2.4 vs. 3.5 °C/W) and different mounting mechanics.

What is the safe operating area (SOA) limitation at 100 V V_DS?

At V_DS = 100 V and T_C = 25 °C, the maximum pulsed drain current is 26 A for pulse widths ≤ 10 ms (Figure 2). Continuous operation at this voltage is limited to 6.5 A by thermal constraints - SOA compliance requires verifying both voltage/current envelope and junction temperature rise in the target application.