Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

STMicroelectronics STL24N60M2

Name: STL24N60M2
Brand: STMicroelectronics
SKU: STL24N60M2
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: STL24N60M2

Manufacturer:: STMicroelectronics

Category:: FETs, MOSFETs

Package:: 8-PowerVDFN

Datasheet:: STL24N60M2.pdf

Description:: MOSFET N-CH 600V 18A PWRFLAT HV

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:36,434

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

STL24N60M2 from STMicroelectronics is an N-channel 600 V, 18 A Power MOSFET in PowerFLAT™ 8x8 HV package, featuring 0.186 Ω typ. R_DS(on), 29 nC total gate charge, and 100% avalanche tested. It serves as a high-voltage switching device in offline SMPS, PFC stages, and industrial motor drives where low conduction loss and rugged dv/dt performance are critical.

For engineers reviewing the STL24N60M2 datasheet, STL24N60M2 pinout, STL24N60M2 application, or STL24N60M2 equivalent, key selection criteria include its 50 V/ns MOSFET dv/dt ruggedness, 1 °C/W junction-to-case thermal resistance, Zener-protected gate, and optimized COSS profile for soft-switching topologies.

Technical Context

This MDmesh™ M2 device uses a strip layout and enhanced vertical structure to simultaneously reduce R_DS(on) and output capacitance (C_OSS = 55 pF typ., C_OSS,eq = 258 pF), enabling high-frequency operation with low switching losses. Its gate threshold voltage (2–4 V) and low Q_gd/Q_g ratio (12/29 nC) support clean turn-off and reduced Miller-induced shoot-through risk.

The integrated source-drain diode exhibits 332 ns reverse recovery time (T_j = 25 °C) and 4 µC Q_rr, with Zener protection limiting gate-source voltage to ±25 V absolute max. Avalanche capability is rated at 3.5 A repetitive I_AR and 180 mJ single-pulse E_AS.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS max	600 V - supports 400 V AC mains-derived DC bus with 50% safety margin
R_DS(on) typ.	0.186 Ω @ V_GS = 10 V, I_D = 9 A - enables <1.5 W conduction loss at 12 A continuous
Q_g	29 nC - reduces gate drive power and allows use of lower-cost drivers
C_OSS,eq	258 pF - lowers capacitive turn-on loss and improves ZVS behavior in resonant converters
dv/dt ruggedness	50 V/ns - ensures reliable operation in hard-switched inductive loads without false triggering
T_j max	150 °C - supports high ambient industrial environments with derated current
R_thj-case	1 °C/W - enables high-power dissipation with minimal heatsink requirement

Pinout & Package

STL24N60M2 uses the PowerFLAT™ 8x8 HV package - a surface-mount, exposed-drain, thermally enhanced leadless package with 8 mm × 8 mm footprint and 0.85 mm typical height. The drain is connected to the bottom thermal pad; source and gate are on the periphery.

Pin/Terminal	Circuit Role	Design Meaning
Drain (thermal pad)	Main current path and thermal interface	Exposed copper pad soldered to PCB ground plane for low-inductance, high-current return and heat extraction
Source (pins 1–3, 5–7)	Reference node for gate control and current return	Multiple parallel pins minimize source inductance and improve stability during fast switching
Gate (pin 4)	Control terminal for channel modulation	Single dedicated pin with low intrinsic gate resistance (7 Ω) to limit ringing and simplify RC snubbing

Key Features

Feature	Design Value
MDmesh™ M2 silicon technology	Enables 0.186 Ω R_DS(on) at 600 V while maintaining low C_OSS and high dv/dt immunity
Zener-protected gate	Integrated gate-body Zener clamps V_GS to ±25 V, eliminating need for external gate protection components
100% avalanche tested	Each unit validated for unclamped inductive switching up to 3.5 A repetitive I_AR, ensuring robustness in real-world faults
Optimized COSS profile	C_OSS,eq = 258 pF over 0–480 V enables predictable soft-switching timing in LLC and phase-shifted full-bridge designs

Applications

Industrial Motor Drives

Server & Telecom SMPS

Use Scenario: Half-bridge switching in 3 kW servo drive inverters operating at 20–50 kHz.

IC Role / Device Role / Timing Role: High-side and low-side switching element handling 18 A RMS load current with fast 14 ns t_d(on) and 15 ns t_f.

Use Value: Low R_DS(on) and 1 °C/W R_thj-case allow direct PCB copper heatsinking without bulky external heatsinks.

Use Scenario: Primary-side switch in 80+ Titanium-certified 1.5 kW server PSU LLC resonant converter.

IC Role / Device Role / Timing Role: Main power switch synchronized to zero-voltage switching transitions with 332 ns t_rr body diode.

Use Value: Low Q_gd/Q_g ratio and 258 pF C_OSS,eq enable precise ZVS window control and <0.5% efficiency penalty at 1 MHz equivalent frequency.

Industrial PFC Boost Stage

EV Onboard Charger (OBC)

Use Scenario: Continuous conduction mode (CCM) boost switch in 3.3 kW industrial PFC front-end.

IC Role / Device Role / Timing Role: Hard-switched 65 kHz boost transistor with 50 V/ns dv/dt ruggedness preventing spurious turn-on.

Use Value: Avalanche rating (180 mJ E_AS) absorbs line surge energy without failure during transient overvoltage events.

Use Scenario: Isolated DC-DC primary switch in bidirectional 6.6 kW OBC using dual-active-bridge topology.

IC Role / Device Role / Timing Role: Synchronous rectifier and switching device supporting 100 kHz–300 kHz variable-frequency operation.

Use Value: 150 °C T_j max and 45 °C/W R_thj-pcb support compact, fanless OBC designs meeting IP67 thermal constraints.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IXTH24N60L2	R_DS(on) = 0.22 Ω, Q_g = 32 nC, TO-247 package	Higher thermal resistance (0.45 °C/W case-to-heatsink vs. 1 °C/W junction-to-PCB), requires mechanical heatsink	Preferred when discrete heatsink mounting and higher peak current (72 A IDM) are required
IPP60R190C7	R_DS(on) = 0.19 Ω, Q_g = 27 nC, TO-220FP package, CoolMOS™ C7	No integrated Zener gate protection; lower C_OSS,eq (190 pF) but no avalanche rating	Selected for cost-sensitive, non-avalanche-critical 65 kHz flyback or QR PFC designs

Compared with IXTH24N60L2 and IPP60R190C7, STL24N60M2 uniquely combines Zener gate protection, 100% avalanche testing, and PCB-optimized PowerFLAT™ thermal performance-making it optimal for space-constrained, high-reliability industrial and EV charging systems where gate robustness and board-level thermal management are prioritized.

Availability

STL24N60M2 is available at Aetrix Electronics and suitable for industrial motor drives, server SMPS, and EV onboard chargers requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for STL24N60M2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.

The STL24N60M2 belongs to ST's MDmesh™ M2 high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-frequency switched-mode power supplies and motor control systems demanding low R_DS(on), low gate charge, and rugged avalanche performance.

FAQ

What is the maximum continuous drain current at 100 °C case temperature?

The STL24N60M2 supports 12 A continuous drain current at T_C = 100 °C, as specified in Table 2 of the datasheet. This derating reflects thermal limits imposed by the PowerFLAT™ 8x8 HV package's 1 °C/W R_thj-case and safe operating area constraints-not silicon limitation.

Does STL24N60M2 include integrated gate protection?

Yes, the device integrates a Zener diode between gate and source, clamping V_GS to ±25 V. This eliminates the need for external gate protection components in most applications, confirmed by the "Zener-protected" feature in the official datasheet cover and electrical characteristics table.

Can STL24N60M2 be used in avalanche mode repeatedly?

Yes-ST specifies 3.5 A repetitive avalanche current (I_AR) with pulse width limited by T_jmax, and every unit undergoes 100% production avalanche testing. This is documented in Table 4 (Avalanche characteristics) and the Features section of the datasheet.

What is the recommended PCB layout for thermal performance?

ST recommends soldering the exposed drain pad to a minimum 250 mm² copper area (2 oz Cu, FR-4) to achieve the rated 45 °C/W R_thj-pcb. The datasheet specifies this in Table 3 (Thermal data note 1) and Figure 21 (footprint), with thermal vias strongly advised under the pad for multi-layer boards.

STL24N60M2 Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: MDmesh™ II Plus

Package/Case:: 8-PowerVDFN

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 600 V

Current - Continuous Drain (Id) @ 25°C:: 18A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 10V

Rds On (Max) @ Id, Vgs:: 210mOhm @ 9A, 10V

Vgs(th) (Max) @ Id:: 4V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 29 nC @ 10 V

Vgs (Max):: ±25V

Input Capacitance (Ciss) (Max) @ Vds:: 1060 pF @ 100 V

FET Feature:: -

Power Dissipation (Max):: 125W (Tc)

Operating Temperature:: 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: PowerFlat™ (8x8) HV

STL24N60M2 FAQ

1.How can I place an order for STL24N60M2 through Aetrix?

Please submit a Request for Quotation (RFQ) for STL24N60M2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STL24N60M2 reliable?

The price and inventory of STL24N60M2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STL24N60M2 is usually 5 days.

3.What payment methods are accepted for STL24N60M2?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STL24N60M2 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STL24N60M2?

STL24N60M2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STL24N60M2 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STL24N60M2?

For technical support, including STL24N60M2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STL24N60M2 requirements.

6.How does Aetrix verify that STL24N60M2 is sourced from the original manufacturer or authorized distributors?

All STL24N60M2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STL24N60M2 meets industry standards.

7.What is the process for return or replacement of STL24N60M2?

All STL24N60M2 units undergo pre-shipment inspection (PSI). If there is an issue with STL24N60M2, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STL24N60M2 part is unused and in its original packaging.

Return procedure for STL24N60M2:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…