STMicroelectronics STP65N150M9

Overview

STP65N150M9 from STMicroelectronics is an N-channel 650 V, 128 mΩ (typ.) super-junction Power MOSFET in TO-220 package, rated for 20 A continuous drain current at 25 °C and featuring 32 nC total gate charge, 1240 pF input capacitance, and 120 V/ns MOSFET dv/dt ruggedness. It serves as a high-voltage switching element in offline SMPS primary-side power stages.

For engineers reviewing the STP65N150M9 datasheet, STP65N150M9 pinout, STP65N150M9 application, or STP65N150M9 equivalent, key selection criteria include R_DS(on) vs. temperature stability, unclamped inductive switching robustness, avalanche energy rating (200 mJ), and gate drive compatibility with standard 10 V logic-level controllers.

Technical Context

This MDmesh M9 device uses multi-drain silicon process architecture to minimize R_DS(on) × Q_g figure-of-merit (FOM) while maintaining high dv/dt immunity (120 V/ns) and Zener-protected gate structure. Its 0.89 °C/W junction-to-case thermal resistance enables high-power operation with minimal heatsinking.

The integrated body diode exhibits 192 ns reverse recovery time (T_J = 25 °C) and 1.8 µC Q_rr, optimized for hard-switched PFC and resonant LLC topologies where diode recovery behavior directly impacts EMI and efficiency.

Key Specifications

Pinout & Package

TO-220 package (Type A or H variant); metal tab is Drain (D), electrically exposed and thermally coupled to die. Standard through-hole mounting with screw-down heatsink interface.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage switching applications.

Compared with IPP65R190C7, STP65N150M9 delivers 21% lower conduction loss at 20 A but demands slightly higher gate drive power; versus STW65N150M9, it trades 38% higher thermal resistance for 40% lower PCB footprint and cost-ideal for space-constrained 1–2 kW industrial supplies.

Availability

STP65N150M9 is available at Aetrix Electronics and suitable for server PSUs, industrial AC-DC adapters, and telecom rectifier modules requiring stable component supply across multi-year production cycles.

Supply support for STP65N150M9 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.

This device belongs to the MDmesh M9 super-junction MOSFET product line, engineered specifically for high-efficiency, high-power-density offline SMPS in 600–650 V applications where low R_DS(on) and rugged switching performance are critical.

FAQ

Is STP65N150M9 suitable for zero-voltage switching (ZVS) topologies?

Yes. Its 290 pF C_oss,eq at 400 V and low Q_gd/Q_gs ratio (15 nC / 7 nC ≈ 2.1) enable reliable ZVS turn-on in LLC resonant converters operating up to 300 kHz. Measured t_d(off) of 42 ns supports precise dead-time control without shoot-through risk.

What is the maximum recommended gate resistor value for hard-switched PFC applications?

For 65 kHz PFC with 10 V gate drive, a 10 Ω resistor limits peak gate current to <1 A while keeping t_r ≤ 5 ns and t_f ≤ 6 ns-within safe SOA limits. Values above 15 Ω increase switching loss disproportionately due to extended Miller plateau duration.

Does the TO-220 package require insulating hardware when mounted to a heatsink?

Yes. The metal tab is internally connected to Drain, so electrical isolation (e.g., mica washer + silicone grease or insulated mounting kit) is mandatory unless the heatsink is floating or referenced to high-side potential. Thermal resistance increases by ~0.3 °C/W with standard isolators.

How does R_DS(on) change over temperature, and what impact does this have on current sharing in paralleled configurations?

R_DS(on) increases 1.8× from 25 °C to 125 °C (per Figure 8), providing inherent current balancing in paralleled devices. At 100 °C case temperature, R_DS(on) ≈ 225 mΩ-ensuring stable load distribution without active current sensing or gate tuning.