Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FET, MOSFET Arrays

STMicroelectronics STS10DN3LH5

Name: STS10DN3LH5
Brand: STMicroelectronics
SKU: STS10DN3LH5
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: STS10DN3LH5

Manufacturer:: STMicroelectronics

Category:: FET, MOSFET Arrays

Package:: 8-SOIC (0.154", 3.90mm Width)

Datasheet:: STS10DN3LH5.pdf

Description:: MOSFET 2N-CH 30V 10A 8SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:10,305

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

STS10DN3LH5 from STMicroelectronics is a dual N-channel 30 V, 10 A Power MOSFET in SO-8 package with R_DS(on) = 0.021 Ω (max) at V_GS = 10 V, Q_g = 4.6 nC, and E_AS = 50 mJ - designed for high-efficiency DC-DC converters and synchronous rectification in industrial power supplies.

For engineers reviewing the STS10DN3LH5 datasheet, STS10DN3LH5 pinout, STS10DN3LH5 application, or STS10DN3LH5 equivalent, key selection criteria include low gate charge for fast switching, avalanche ruggedness for unclamped inductive loads, thermal resistance (R_thJC = 50 °C/W), and SO-8 footprint compatibility with standard PCB layout practices.

Technical Context

This dual N-channel MOSFET integrates two identical STripFET™ V cells in a single SO-8 package, enabling half-bridge or dual-switch configurations without external paralleling. Its optimized gate charge profile (Q_gd/Q_gs = 1.9/0.67 nC) supports clean turn-off with minimal Miller-induced shoot-through risk.

The device features a robust body diode with t_rr = 16.2 ns and Q_rr = 7.8 nC at di/dt = 100 A/µs, making it suitable for synchronous rectification where reverse recovery behavior directly impacts efficiency and EMI.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	30 V - maximum drain-source blocking voltage for 24 V system-level designs with margin
R_DS(on) max	0.021 Ω at V_GS = 10 V - enables <1 W conduction loss at 10 A continuous current
I_D cont	10 A at T_C = 25 °C - supports high-current switching in compact heatsink-limited layouts
Q_g	4.6 nC - reduces gate drive power loss and allows use of low-power drivers (e.g., TC4427)
E_AS	50 mJ - withstands single-pulse inductive energy without failure in unclamped switching events
t_r/t_f	22 ns / 2.8 ns - enables >1 MHz operation with controlled dV/dt and minimal switching loss
R_thJC	50 °C/W - permits direct case-to-heatsink thermal path for sustained 7 A operation at T_C = 100 °C

Pinout & Package

STS10DN3LH5 uses an SO-8 surface-mount package with exposed drain pad for enhanced thermal performance. Pin numbering follows JEDEC MS-012AC standard (pin 1 = G1, pin 2 = S1, pin 3 = D1, pin 4 = D1, pin 5 = D2, pin 6 = S2, pin 7 = G2, pin 8 = D2).

Pin/Terminal	Circuit Role	Design Meaning
G1	Gate of Channel 1	Independent control input for first N-channel switch; requires 10 V drive for full enhancement
S1	Source of Channel 1	Reference node for Channel 1; tied to local ground or low-side return path
D1	Drain of Channel 1	High-current output terminal; internally connected to pins 3 and 4 for low-inductance routing
D2	Drain of Channel 2	High-current output terminal; internally connected to pins 5 and 8 for parallel drain connection
S2	Source of Channel 2	Reference node for Channel 2; electrically isolated from S1 unless externally tied
G2	Gate of Channel 2	Independent control input for second N-channel switch; no internal coupling to G1

Key Features

Feature	Design Value
STripFET™ V technology	Enables industry-leading R_DS(on) × Q_g figure-of-merit (FOM) for reduced total switching + conduction loss
High avalanche ruggedness	50 mJ single-pulse rating ensures reliability in flyback, boost, and motor drive inductive switching
Low gate drive power loss	4.6 nC total gate charge minimizes driver IC power dissipation and heat generation
SO-8 with exposed drain	Thermal resistance R_thJC = 50 °C/W enables direct heatsinking without additional thermal vias
Enhanced body diode performance	16.2 ns reverse recovery time and 7.8 nC Q_rr reduce switching loss and EMI in synchronous rectifier topologies

Applications

DC-DC Converter High-Side Switch

Synchronous Rectifier

Use Scenario: Used as high-side switch in non-isolated buck converter delivering 12 V @ 8 A from 24 V input.

IC Role / Device Role: Main power switch controlling duty cycle and regulating output voltage via PWM.

Use Value: Low R_DS(on) (0.021 Ω) limits conduction loss to 1.3 W; fast t_f (2.8 ns) suppresses shoot-through during dead-time transitions.

Use Scenario: Replaces Schottky diode in secondary side of isolated forward converter operating at 300 kHz.

IC Role / Device Role: Synchronous rectifier replacing passive diode to improve efficiency and reduce thermal load.

Use Value: Body diode t_rr = 16.2 ns and low Q_rr minimize voltage spikes and switching loss; R_DS(on) yields 50% lower conduction loss vs. 40 V/10 A Schottky.

Half-Bridge Motor Driver

Hot-Swap Controller

Use Scenario: Upper and lower switches in H-bridge driving 24 V brushed DC motor with peak current up to 15 A.

IC Role / Device Role: Dual-channel configuration provides complementary high- and low-side switching in compact layout.

Use Value: Independent gate terminals (G1/G2) allow precise timing control; avalanche rating protects against back-EMF transients during abrupt stop.

Use Scenario: Inrush current limiter in 24 V telecom board with hot-plug capability and 10 A steady-state load.

IC Role / Device Role: Low-side switch controlling power ramp-up via gate-controlled slew rate.

Use Value: Precise V_GS(th) (1 V typ.) enables accurate gate biasing for linear-mode current limiting; SO-8 thermal performance sustains 10 A continuously.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual N-channel MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IRF7341PbF	R_DS(on) = 0.055 Ω (higher), Q_g = 19 nC (much higher), same SO-8 package	Lower switching efficiency above 200 kHz due to higher gate charge and on-resistance	Preferable only if cost sensitivity outweighs efficiency requirements in <100 kHz applications
DMN3025LSD-13	R_DS(on) = 0.025 Ω (slightly higher), Q_g = 5.2 nC (comparable), dual N-channel in SO-8	Similar thermal performance but lacks specified E_AS rating; less validated for unclamped inductive stress	Acceptable for non-avalanche-critical DC-DC topologies where layout controls voltage overshoot

Compared with IRF7341PbF and DMN3025LSD-13, STS10DN3LH5 delivers superior FOM (R_DS(on) × Q_g) and guaranteed avalanche energy, making it optimal for high-frequency, high-reliability power stages where thermal headroom and transient robustness are design constraints.

Availability

STS10DN3LH5 is available at Aetrix Electronics and suitable for industrial power supplies, telecom DC-DC modules, and motor control boards requiring stable component supply and long-term manufacturability.

Supply support for STS10DN3LH5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, microcontrollers, sensors, and automotive ICs.

STS10DN3LH5 belongs to ST's STripFET™ V Power MOSFET product line, engineered specifically for high-efficiency, high-density power conversion in industrial and telecom infrastructure where low R_DS(on), fast switching, and avalanche reliability are critical.

FAQ

What is the maximum continuous drain current at 100 °C case temperature?

The STS10DN3LH5 supports 7 A continuous drain current at T_C = 100 °C, as specified in Table 2 of the datasheet. This derating reflects thermal limitations of the SO-8 package and must be verified against actual board-level thermal resistance in the target application.

Can STS10DN3LH5 be used in linear mode for hot-swap applications?

Yes - its V_GS(th) of 1 V (typ.) and R_DS(on) flatness across V_GS enable stable linear-mode operation. However, safe operating area (SOA) curves in Figure 2 must be consulted to ensure pulse width, voltage, and current remain within limits during inrush limiting.

Is the body diode suitable for synchronous rectification at 500 kHz?

Yes - with t_rr = 16.2 ns and Q_rr = 7.8 nC at di/dt = 100 A/µs, the intrinsic body diode meets performance requirements for synchronous rectification up to 500 kHz in well-designed layouts with minimized parasitic inductance.

Does STS10DN3LH5 have lead-free and RoHS-compliant packaging?

Yes - the device is offered in ECOPACK®-compliant SO-8 packaging, meeting RoHS Directive 2011/65/EU and halogen-free requirements per ST's ECOPACK2 specification, with lead finish compatible with standard SnPb and Pb-free reflow profiles.

STS10DN3LH5 Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: STripFET™ V

Package/Case:: 8-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Not For New Designs

Technology:: MOSFET (Metal Oxide)

Configuration:: 2 N-Channel (Dual)

FET Feature:: Logic Level Gate

Drain to Source Voltage (Vdss):: 30V

Current - Continuous Drain (Id) @ 25°C:: 10A

Rds On (Max) @ Id, Vgs:: 21mOhm @ 5A, 10V

Vgs(th) (Max) @ Id:: 1V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 4.6nC @ 5V

Input Capacitance (Ciss) (Max) @ Vds:: 475pF @ 25V

Power - Max:: 2.5W

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-SOIC

STS10DN3LH5 FAQ

1.How can I place an order for STS10DN3LH5 through Aetrix?

Please submit a Request for Quotation (RFQ) for STS10DN3LH5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STS10DN3LH5 reliable?

The price and inventory of STS10DN3LH5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STS10DN3LH5 is usually 5 days.

3.What payment methods are accepted for STS10DN3LH5?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STS10DN3LH5 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STS10DN3LH5?

STS10DN3LH5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STS10DN3LH5 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STS10DN3LH5?

For technical support, including STS10DN3LH5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STS10DN3LH5 requirements.

6.How does Aetrix verify that STS10DN3LH5 is sourced from the original manufacturer or authorized distributors?

All STS10DN3LH5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STS10DN3LH5 meets industry standards.

7.What is the process for return or replacement of STS10DN3LH5?

All STS10DN3LH5 units undergo pre-shipment inspection (PSI). If there is an issue with STS10DN3LH5, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STS10DN3LH5 part is unused and in its original packaging.

Return procedure for STS10DN3LH5:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…